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Lars-Peter Clausen 052860cbc3 axi_dmac: Fix source pause signal 
For the source controller use the pause signal that has been properly
transferred to the source clock domain rather than the pause signal from
the request clock domain.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2015-09-16 11:02:08 +02:00
library axi_dmac: Fix source pause signal 2015-09-16 11:02:08 +02:00
projects usdrx1: Add DDR FIFO 2015-09-01 11:21:45 +02:00
.gitattributes Add .gitattributes file 2015-07-01 18:43:51 +02:00
.gitignore gitignore: add non-project stuff 2015-05-01 13:17:14 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update to Quartus 15.0. Removed release candidate note 2015-08-13 11:55:23 +03:00

README.md

#HDL Reference Designs

Analog Devices HDL libraries and projects

###Tools version:

###Documentation and support

For first time users, it is highly recommended to go through our HDL user guide.

For support please visit our FPGA Reference Designs Support Community on EngineerZone.