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pluto_hdl_adi/library/axi_ad9144
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Istvan Csomortani 5329458a62 library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl 2019-06-29 06:53:51 +03:00
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Makefile all: Rename altera to intel 2019-06-29 06:53:51 +03:00
axi_ad9144.v Add FPGA info parameters flow 2019-03-30 11:26:11 +02:00
axi_ad9144_constr.xdc axi_ad9144: Added CDC and reset constraints 2015-04-23 10:19:43 +03:00
axi_ad9144_hw.tcl library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl 2019-06-29 06:53:51 +03:00
axi_ad9144_ip.tcl library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00