AndreiGrozav ce04f46b80 motcon2_zed: Fix timing problems ... -change implementation strategy -axi_dmac add extra registers AXI_SLICE_SRC This was done to increase the overall timing margin.		2019-02-12 10:43:46 +02:00
..
Makefile	motocon: Use new pack infrastructure	2018-11-28 11:33:11 +02:00
system_bd.tcl	motcon2_fmc: initial commit of the base design	2015-01-08 11:57:22 +02:00
system_constr.xdc	motcon2_fmc: Add additional clock constraints and set delays for ethernet	2018-06-14 16:06:43 +03:00
system_project.tcl	motcon2_zed: Fix timing problems	2019-02-12 10:43:46 +02:00
system_top.v	all/system_top.v: loopback gpio lines	2018-10-04 14:19:37 +03:00