// ***************************************************************************
// ***************************************************************************
// Copyright 2016(c) Analog Devices, Inc.
//
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// ***************************************************************************
// ***************************************************************************

`timescale 1ns/100ps

module daq1_spi (

  spi_csn,
  spi_clk,
  spi_mosi,
  spi_miso,

  spi_sdio);

  // 4 wire

  input           spi_csn;
  input           spi_clk;
  input           spi_mosi;
  output          spi_miso;

  // 3 wire

  inout           spi_sdio;

  // device address

  localparam  [ 7:0]  SPI_SEL_AD9684  = 8'h80;
  localparam  [ 7:0]  SPI_SEL_AD9122  = 8'h81;
  localparam  [ 7:0]  SPI_SEL_AD9523  = 8'h82;
  localparam  [ 7:0]  SPI_SEL_CPLD    = 8'h83;

  // internal registers

  reg     [ 5:0]  spi_count = 6'b0;
  reg             spi_rd_wr_n = 1'b0;
  reg             spi_enable = 1'b0;
  reg     [ 7:0]  spi_device_addr = 8'b0;

  // internal signals

  wire            spi_enable_s;

  // check on rising edge and change on falling edge

  assign spi_enable_s = spi_enable & ~spi_csn;

  always @(posedge spi_clk or posedge spi_csn_s) begin
    if (spi_csn_s == 1'b1) begin
      spi_count <= 6'b0000000;
      spi_rd_wr_n <= 1'b0;
      spi_device_addr <= 8'b00000000;
    end else begin
      spi_count <= spi_count + 1'b1;
      if (spi_count <= 6'd7) begin
        spi_device_addr <= {spi_device_addr[6:0], spi_mosi};
      end
      if (spi_count == 6'd8) begin
        spi_rd_wr_n <= spi_mosi;
      end
    end
  end

  always @(negedge spi_clk or posedge spi_csn_s) begin
    if (spi_csn_s == 1'b1) begin
      spi_enable <= 1'b0;
    end else begin
      if (((spi_device_addr == SPI_SEL_AD9684) && (spi_count == 6'd24)) ||
          ((spi_device_addr == SPI_SEL_AD9122) && (spi_count == 6'd16)) ||
          ((spi_device_addr == SPI_SEL_AD9523) && (spi_count == 6'd24)) ||
          ((spi_device_addr == SPI_SEL_CPLD)   && (spi_count == 6'd16))) begin
        spi_enable <= spi_rd_wr_n;
      end
    end
  end

  // io butter

  IOBUF i_iobuf_sdio (
    .T (spi_enable_s),
    .I (spi_mosi),
    .O (spi_miso),
    .IO (spi_sdio));

endmodule

// ***************************************************************************
// ***************************************************************************