// ***************************************************************************
// ***************************************************************************
// Copyright 2014(c) Analog Devices, Inc.
//
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without modification,
// are permitted provided that the following conditions are met:
//     - Redistributions of source code must retain the above copyright
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//     - The use of this software may or may not infringe the patent rights
//       of one or more patent holders.  This license does not release you
//       from the requirement that you obtain separate licenses from these
//       patent holders to use this software.
//     - Use of the software either in source or binary form, must be run
//       on or directly connected to an Analog Devices Inc. component.
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ***************************************************************************
// ***************************************************************************
// ***************************************************************************
// ***************************************************************************

`timescale 1ns/100ps

module ad_lvds_out (

  // data interface

  tx_clk,
  tx_data_p,
  tx_data_n,
  tx_data_out_p,
  tx_data_out_n);

  // parameters

  parameter   BUFTYPE = 0;
  localparam  SERIES7 = 0;
  localparam  VIRTEX6 = 1;

  // data interface

  input               tx_clk;
  input               tx_data_p;
  input               tx_data_n;
  output              tx_data_out_p;
  output              tx_data_out_n;

  // internal signals

  wire                tx_data_oddr_s;

  // transmit data interface, oddr -> obuf

  ODDR #(
    .DDR_CLK_EDGE ("SAME_EDGE"),
    .INIT (1'b0),
    .SRTYPE ("ASYNC"))
  i_tx_data_oddr (
    .CE (1'b1),
    .R (1'b0),
    .S (1'b0),
    .C (tx_clk),
    .D1 (tx_data_p),
    .D2 (tx_data_n),
    .Q (tx_data_oddr_s));

  OBUFDS i_tx_data_obuf (
    .I (tx_data_oddr_s),
    .O (tx_data_out_p),
    .OB (tx_data_out_n));

endmodule

// ***************************************************************************
// ***************************************************************************