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15 Commits (ff7b8ef6ae0a9b524c386f8854c7102d0941e83c)

Author SHA1 Message Date
Iulia Moldovan 2f35ce8a51 check_guideline.py: Change copyright format checker 
* Added copyright and license header
 * Updated files on which it runs on
 * SystemVerilog not to be supported, since now there are some pkg files
 that do not have the format of a Verilog file, thus making the
 checker to fail all the time -- which is not good
 * Now it can run on files which contain JESD in their paths, because
   now all of them have the copyright on the same line (but the
 copyright inside the JESD license can't be checked yet by the script)

Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-07-11 15:12:28 +03:00
Iulia Moldovan c5cbbfe022 docs: Add HDL PR process documentation 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-05-30 13:13:15 +03:00
Jem Geronimo d152ad1e9d
add: softspan support in adc_channel regmap (#1081) 
docs/regmap/adi_regmap_adc.txt: 
- add softspan to regmap
library/common/up_adc_channel.v
- update copyright year header
- add softspan to regmap
library/common/up_adc_common.v
- update minor version

Signed-off-by: John Erasmus Mari Geronimo <Johnerasmusmari.Geronimo@analog.com>
 2023-04-20 19:05:38 +08:00
AndrDragomir e0ab169fed docs/FMC_eval_board_template: Update instructions 2023-04-11 11:53:48 +03:00
PopPaul2021 41f4f1a988 docs/regmap: Updates on regmap text files to match the Wiki page updates. 2023-03-14 10:08:03 +02:00
Ionut Podgoreanu b3f3f7c392 docs/regmap: Added the regmap file for the generic TDD controller 2022-12-13 16:26:02 +02:00
Travis F. Collins a07cec4a84 Remove extra FIELD marker in regmap 
Fix minor typo in adc regmap which is breaking an external parser.

Signed-off-by: Travis F. Collins <travis.collins@analog.com>
 2022-10-19 21:34:37 +03:00
alin724 0620f8425d regmap/adi_regmap_common.txt: Add missing RD_RAW_DATA field 2022-10-19 09:41:38 +03:00
Filip Gherman 56789abf2b docs/regmap: Added the new ADDRESS_HIGH registers to the DMAC regmap 
Signed-off-by: Filip Gherman <Filip.Gherman@analog.com>
 2022-10-18 16:59:18 +03:00
alin724 28ace647d1 up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module 2022-10-05 14:56:36 +03:00
alin724 775a23ebf2 up_adc_channel: Update IPs and adi_regmap_adc definition file to latest up_adc_channel module 2022-10-05 14:27:51 +03:00
PopPaul2021 542c361e0a
docs/regmap: Added ADI regmap_*.txt files (#1008) 2022-09-21 15:12:35 +03:00
AndrDragomir b02f437110 docs: Add common template for evaluation board specific fmc files 
Instructions to use the template are found on the first page of the template

Signed-off-by: AndrDragomir <andrei.dragomir@analog.com>
 2022-09-20 14:11:08 +03:00
Iulia Moldovan 86408ff2b3 docs: Add HDL coding guideline 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2022-05-12 14:43:35 +03:00
Robin Getz 779a5dba22 HDL Logo: Add 
Add a small logo for branding and documetation purposes.

Signed-off-by: Robin Getz <robin.getz@analog.com>
 2021-09-16 16:49:52 +03:00