4 Commits (f7b8a2dfb5fc991db2efb07fa3e29dedb752d8f2)

Author	SHA1	Message	Date
Istvan Csomortani	738f7af23b	ad40xx_fmc: SDI delay should be set to 1 ... In general we have to add a delay of half SCLK cycle. (latch the MISO on the next consecutive SCLK edge)	2020-08-13 10:01:16 +03:00
Stanca Pop	fcf7bb035a	ad40xx: Fix data_width definition	2020-01-14 15:24:43 +02:00
Stanca Pop	9497b1cace	ad40xx: Remove redundant upscaler IP, Add timing constraints	2020-01-09 11:32:31 +02:00
Istvan Csomortani	9ab88f1200	ad40xx: Initial commit	2019-06-28 11:18:29 +03:00