Commit Graph

3 Commits (f7b8a2dfb5fc991db2efb07fa3e29dedb752d8f2)

Author SHA1 Message Date
Istvan Csomortani f624d5df40 intel_mem_asym: Update the interface definitions
The ram_2port IP has different interface names in Quartus PRO and
Quartus Standard.

Update the interface names for the support Quartus PRO.
2020-08-11 10:14:18 +03:00
Istvan Csomortani 2f0dbe6151 intel_mem_asym: Rename the alt_mem_asym to intel_mem_asym 2019-06-29 06:53:51 +03:00
Istvan Csomortani 79b6ba29ce all: Rename altera to intel 2019-06-29 06:53:51 +03:00