Adrian Costina
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43e03ca6f7
|
arradio: Updated project
- made the reset bridges asynchronous
- connected the arradio gpio to the CPU interconnect
|
2016-02-16 14:50:23 +02:00 |
|
Adrian Costina
|
a0e67aad56
|
c5soc: Updated common design
|
2015-11-24 13:22:01 +02:00 |
Rejeesh Kutty
|
a8a71b4971
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alt-tq: common file
|
2015-06-04 11:00:25 -04:00 |
dbogdan
|
5a42c10233
|
projects/fmcomms2/c5soc: Added video output. HPS SPI was replaced by 3 Wire SPI.
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2014-08-27 21:46:23 +03:00 |
|
Rejeesh Kutty
|
a388ccab0a
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fmcomms2/c5soc: initial checkin
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2014-07-02 14:56:00 -04:00 |
|
Rejeesh Kutty
|
c1b7fc17f5
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c5soc: initial a5soc copy
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2014-07-01 13:05:26 -04:00 |