0ecfc14e95
daq1_fmc: Update interrupts.
2014-11-24 18:23:32 +02:00
9b104f1657
daq1_fmc: Get rid of the concat module inside the block design.
...
xl_concat just causing troubles, no need to use it, if not justified.
2014-11-24 18:23:30 +02:00
64b4d0177e
ad9467_zed: Using ad_iobuf module for IO buffer instantiations on top
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No functional changes, we just try to keep consistency.
2014-11-24 18:23:29 +02:00
83c2eefea2
ad9467_fmc: Update interrupts
2014-11-24 18:23:28 +02:00
114406335d
ad9467_fmc: Connect dma controller directly to the HP port
2014-11-24 18:23:27 +02:00
67065a3130
ad9680_eval: removed
2014-11-24 11:04:34 -05:00
76fb5d3da9
ad9625_vc707: dmafifo address width now is an argument of the process
2014-11-24 16:52:10 +02:00
403f8c0631
util_cpack: ipi doesn't like local params
2014-11-21 15:32:13 -05:00
3b500bafcc
util_cpack: add port controls on ipi
2014-11-21 15:32:12 -05:00
5ca2944b70
library/util_cpack: initial checkin
2014-11-21 15:32:10 -05:00
1834cf6d38
adi_prcfg_project: Update the PR design flow
...
Optimization directive kept on default in the implementation flow.
2014-11-21 19:26:33 +02:00
83d79a6acf
fmcomms2_pr: Update system_project script for mitx
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Bist logic is using the pnmon module for PRBS checking.
2014-11-21 19:23:12 +02:00
6517a94929
fmcomms2_pr: Update interrupts and iobuf
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No functional changes, update to the new interrupt path, and change the
iobuf instantiation in order to keep consistency.
2014-11-21 19:22:03 +02:00
65588f1b67
fmcomms2_pr: Cosmetic changes of mitx system top.
2014-11-21 19:20:30 +02:00
84f8377beb
fmcjedadc1_vc707: Add support for linear flash interface
2014-11-21 19:19:21 +02:00
e8546b9c3b
fmcjesdadc1: Update interrupts for KC705 and VC707
2014-11-21 19:18:30 +02:00
b0f571ce0c
fmcjesdadc1: Fix parameter lane number for GT core
2014-11-21 19:17:29 +02:00
c0f4d7e2b5
mitx045_common: Definition file patch
...
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.
NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
5e08e18022
ad9434_fmc: Update interrupts
2014-11-21 19:06:48 +02:00
db004641d3
kcu105: dmafifo address width change
2014-11-20 09:28:03 -05:00
cdd1408d3c
dmafifo: parameterized address width
2014-11-20 09:28:02 -05:00
2912372d6e
ad9625_fmc: Add support for AD-JESDCLOCK1-EBZ
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Connect the SPARE_CLOCK_DUT pin to GPIO, this will be used to reset the AD9527.
The SPI interface for the clock chip is already integrated into the design.
2014-11-18 14:11:51 +02:00
bbf1f0c156
adi_project: Add board definition for mitx045
2014-11-18 10:05:57 +02:00
e3378cd6cb
mitx045_board_definition: revert old board definition file
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Revert commit 4f6aa159b8
2014-11-18 10:05:55 +02:00
6e194dbcc0
adv7511_ac701: Fix project source files definition
2014-11-18 10:05:54 +02:00
766589637e
prcfg_zc706: Update data width and project script
2014-11-18 10:05:53 +02:00
42874bfe81
prcfg_library: Major update
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Get rid of the QPSK symbol wrapper for now. The DMA data path is using the 2 LSB bits.
2014-11-18 10:05:52 +02:00
5c7e8eb926
prcfg_setup: Fix data width, delete invalid ILA configurations
2014-11-18 10:05:51 +02:00
bd57c2246e
prcfg: Increase the PR portion area in order to increase the DSP resource.
2014-11-18 10:05:49 +02:00
344f1bb539
adv7511_kc705: Fix project source definition
2014-11-18 10:05:48 +02:00
01b3495a81
fmcomms1: Updated ZC706 project to be compatible with util_wfifo and increased system_constr.xdc priority
2014-11-17 18:33:21 +02:00
20a3f322e7
fmcomms1: Updated zc702 project
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- fixed timing constraints, increased system_constr.xdc priority
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:32:12 +02:00
adcd16d033
fmcomms1: Updated zed project
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- fixed timing constraints
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:31:24 +02:00
a4724f8396
es: added kcu105 gth
2014-11-17 09:55:12 -05:00
b1c91fac92
es: added kcu105 gth
2014-11-17 09:55:10 -05:00
fd305f2eff
es: added kcu105 gth
2014-11-17 09:55:09 -05:00
6dd1226696
axi_ad9643: Fixed constraint file
2014-11-17 12:12:09 +02:00
8831d9dbd7
axi_ad9122: fixed constraint file
2014-11-17 12:11:20 +02:00
2744d0cb37
util_wfifo: Update to implement flip flops
2014-11-17 12:10:21 +02:00
5d1a0a14bf
ad9625x2_fmc: dma fifo changes
2014-11-14 16:00:32 -05:00
41ffc66c26
fifo2s: removed m interface
2014-11-13 15:00:03 -05:00
2eb80715e3
ad9625_fmc: dma fifo changes
2014-11-13 14:13:00 -05:00
eaacd4d49a
adi_project.tcl: Fix message severity (working solution)
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Need to define the default/initial severity too.
2014-11-13 18:55:43 +02:00
4bcf338e9b
adi_project.tcl : Fix message severity
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When message severity is set to 'error', need to do it quiet, other way the tool will stop after synthesis, complaining for previous errors.
2014-11-13 16:33:47 +02:00
5baa015246
kc705_base: Delete timing constraints
2014-11-13 16:30:37 +02:00
3915f7d5f4
daq2: kcu105 dma-fifo changes
2014-11-12 15:25:13 -05:00
d79e95b774
daq2: dma-fifo changes
2014-11-12 15:24:54 -05:00
074662a622
dmafifo: common interface with fifo2s
2014-11-12 15:24:31 -05:00
8761db438e
axi_fifo2f: common interface with fifo2s
2014-11-12 15:15:32 -05:00
855919ee8e
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:50 -05:00
Istvan Csomortani
Rejeesh Kutty
Adrian Costina