Rejeesh Kutty
e760aa424a
daq2/a10gx-- intmem to ddr
2015-08-19 13:26:38 -04:00
Rejeesh Kutty
8cc3aa0865
ddr- 933/233
2015-08-19 13:26:38 -04:00
Istvan Csomortani
57cfb7cfb1
hdl/library: Update the IP parameters
...
The following IP parameters were renamed:
PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
2015-08-19 14:11:47 +03:00
Rejeesh Kutty
0422c87846
a5soc/base- remove hdmi, led/switchs to gpio
2015-07-27 12:08:33 -04:00
Rejeesh Kutty
f5f9ec38e8
a5soc- base/fmc split
2015-07-27 12:08:32 -04:00
Rejeesh Kutty
58e0884ff9
a5soc- board qsys file
2015-07-27 12:08:32 -04:00
Adrian Costina
4d7ff0ed15
a5gte: Update ethernet connections
2015-07-27 16:05:26 +03:00
Adrian Costina
31ab81d627
a5gt: Updated ethernet clock constraints
2015-07-27 16:02:51 +03:00
Rejeesh Kutty
a1733238df
fmcjesdadc1- base/board split up
2015-07-23 15:21:53 -04:00
Rejeesh Kutty
3e2712cf18
a5gt-base: initial updates
2015-07-22 15:22:22 -04:00
Rejeesh Kutty
64070b6f27
a5gt- base system
2015-07-22 15:04:59 -04:00
Rejeesh Kutty
08e46c5ff2
a10gx-base: data-master connections
2015-07-21 10:53:54 -04:00
Rejeesh Kutty
a87b8fbf94
a10gx- base system only
2015-07-20 09:29:30 -04:00
Rejeesh Kutty
1f7745610e
daq2- ddr updates
2015-07-14 12:46:52 -04:00
Lars-Peter Clausen
6862655b0d
Add .gitattributes file
...
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty
15740a7d34
fmcjesdadc1- 15.0 updates
2015-06-24 05:31:09 -04:00
Rejeesh Kutty
e3e4af5c51
daq2/zc706: open ports
2015-06-10 14:25:58 -04:00
Rejeesh Kutty
dc7064ab95
fmcomms2/vc707 - wfifo changes
2015-06-05 12:44:04 -04:00
Rejeesh Kutty
a8a71b4971
alt-tq: common file
2015-06-04 11:00:25 -04:00
Rejeesh Kutty
f81d22a17a
altera- common timing check
2015-06-04 10:56:32 -04:00
Rejeesh Kutty
d111692608
daq2/a10gx- ddr-ref @133
2015-06-04 10:53:16 -04:00
Lars-Peter Clausen
264dbfed35
common: rfsom: Add constraints for the eth1 rx clock
...
Add clock rate constraints for the eth1 rx clock, otherwise the tools
assume the RX paths are unconstrained and creates a bitstream which
violates hold times which causes bit errors on the RX path.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-03 17:21:43 +02:00
Rejeesh Kutty
71b5004b25
projects- drp moved to up-clock domain
2015-06-01 14:57:59 -04:00
Rejeesh Kutty
f9ffaf457d
projects/daq2- drp moved to up clock
2015-06-01 13:39:26 -04:00
Rejeesh Kutty
aa24c442f5
a10gx- no-ddr
2015-06-01 11:00:01 -04:00
Adrian Costina
29ca9e4b8c
vc707: common, fixed address range for flash
2015-05-23 00:14:08 +03:00
Adrian Costina
8bd5fa5802
kc705: Common, fixed address range for the flash. Changed the start address so that it won't interfere with other cores
2015-05-23 00:10:06 +03:00
Rejeesh Kutty
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
Rejeesh Kutty
b311b9dac6
a10gx- updates
2015-05-14 14:35:42 -04:00
Rejeesh Kutty
515dfd88d4
a10gx- added
2015-05-11 11:56:22 -04:00
Adrian Costina
3d4e9eb36a
ac701: common, commit ethernet reset pin
2015-05-11 16:41:28 +03:00
Istvan Csomortani
bad821ba1c
sys_dmafifo: Update the p_sys_dacfifo process
...
Update the ports and parameters at util_dacfifo instantiation.
2015-05-11 12:20:47 +03:00
Rejeesh Kutty
81a20b4abb
rfsom- apisys lb updates
2015-05-08 15:22:17 -04:00
Adrian Costina
68570c1815
vc707: Common system mig, updated datawidth to 256 from 128
2015-05-08 10:51:27 +03:00
Rejeesh Kutty
2a8703763e
zc706pr - 706 partial reconfiguration
2015-05-04 12:33:28 -04:00
Rejeesh Kutty
aced144916
itx045: updates
2015-05-01 16:18:23 -04:00
Rejeesh Kutty
ff443655ca
itx045: add ps7 settings
2015-05-01 16:17:59 -04:00
Adrian Costina
19ef85cec3
vc707: Changed mig project to use BANK_ROW_COLUMN, as it seems this mode gives best performance
2015-04-28 17:15:58 +03:00
Rejeesh Kutty
272148eee5
rfsom: sdio 50mhz
2015-04-23 15:30:50 -04:00
Rejeesh Kutty
7611c2ae17
kcu105: ddr mig rbc to rcb
2015-04-23 15:30:48 -04:00
Lars-Peter Clausen
f232a36141
common: Place HDMI interface registers into the IOB
...
The paths from the HDMI interface registers to the IO pads are
unconstrained. This means the P&R can in theory put the register anywhere
which could lead to stability issues on the interface, depending on what
else is in the fabric. To get predictable delays for the register to IO pad
path place the register into the IOB section.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-23 14:33:47 +02:00
Rejeesh Kutty
e25cfb9d9f
rfsom: ddr configuration
2015-04-22 13:45:11 -04:00
Istvan Csomortani
a100ecd308
util_dacfifo: Update BRAM DAC Fifo
...
The fifo will be placed between the DMAC and the Upack module, all the interfaces were updated.
2015-04-21 15:45:56 +03:00
Lars-Peter Clausen
afea42f444
rfsom: Use interface connection for the I2S stream
...
Use a interface connection for the I2S stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:26 +02:00
Lars-Peter Clausen
90e132d203
mitx045: Use interface connection for the I2S stream
...
Use a interface connection for the I2S stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
Lars-Peter Clausen
7f26bfe436
zed: Use interface connection for the I2S stream
...
Use a interface connection for the I2S stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
Lars-Peter Clausen
06e37b0082
common: zed: Use interface to connect I2C core to the I2C mixer
...
Use a interface connection for the I2C connection instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
Lars-Peter Clausen
7da59a435f
common: rfsom: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
Lars-Peter Clausen
1f2ecaf037
common: mitx045: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
Lars-Peter Clausen
1d66cf63b6
common: zc706: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00