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5 Commits (e00ee136f6017deec7acc8d80fc54df44ba409b7)

Author SHA1 Message Date
Stanca Pop fa259c7975 ad40xx: Fix a typo 2020-01-10 10:20:06 +02:00
Stanca Pop 9497b1cace ad40xx: Remove redundant upscaler IP, Add timing constraints 2020-01-09 11:32:31 +02:00
Istvan Csomortani cf9d0814d5 ad40xx/zed: Place all the SPI registers near IOB 2019-06-28 11:18:29 +03:00
Istvan Csomortani 10e1abc22f ad40xx_fmc/zed: Delete IOB TRUE constraints 
Vivado can not apply the IOB TRUE constraint to only one bit of a
registers. So these constraints will generate several CRITICAL WARNING.

Taking into consideration the maximum used frequencies and current
architecture these constraints are not critical.
 2019-06-28 11:18:29 +03:00
Istvan Csomortani 9ab88f1200 ad40xx: Initial commit 2019-06-28 11:18:29 +03:00