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3 Commits (de70157e3a50dae3013609cdcbedf30768d103c2)

Author SHA1 Message Date
Nick Pillitteri c1721e18dd account for ADI_VIVADO_IP_LIBRARY global variable when adding subcores 2022-03-24 16:29:49 +02:00
David Winter 7423ecae14 data_offload: Improve external synchronization 
This commit adds a new synthesis option to the design, that controls
whether an internal clock domain crossing will be generated. Disabling
this option allows you to use a synchronization signal that is
synchronized to the write clock domain externally, and possibly shared
between multiple devices.

The default value retains the old behavior.

Signed-off-by: David Winter <david.winter@analog.com>
 2021-09-08 11:58:01 +03:00
Istvan Csomortani 86b611c1f7 data_offload: Initial commit 2021-08-06 11:55:24 +03:00