By default every base design has a SPI interface (hard or soft). In
case of soft IPs (xilinx), the input registers of the interface by default have
the IOB attribute set to TRUE. If the interface are not used, the tool will
generate a critical warning, stating that IOB registers are not connected to
an IO buffer.
The following constraints are disabling the above setup for every base
design, which using a soft SPI IP.