Commit Graph

1444 Commits (d94f15745407a23a93c2b20e8281148840f5f1ab)

Author SHA1 Message Date
Adrian Costina d94f157454 arradio: Changed ADC/DAC DMA address length to 24 bit 2016-02-16 15:27:51 +02:00
Adrian Costina 43e03ca6f7 arradio: Updated project
- made the reset bridges asynchronous
- connected the arradio gpio to the CPU interconnect
2016-02-16 14:50:23 +02:00
Adrian Costina 61f9f72a75 fmcjesdadc1: Updated VC707 project for maximum throughput from DMA to DDR
- Increased the DMAs internal FIFO
2016-02-09 12:30:56 +02:00
Adrian Costina c431adb793 fmcjesdadc1: Updated KC705 project for maximum throughput from DMA to DDR
- Increased the DMA internal FIFO
2016-02-09 12:00:27 +02:00
Adrian Costina ad9ecbbbb6 daq2: Updated a10gx project to quartus 15.1.1 2016-02-05 17:43:05 +02:00
Istvan Csomortani e22d5d5c18 daq2: Fix clock constraints for KC705 and VC707 2016-01-22 19:09:57 +02:00
Adrian Costina 59fbd99fdb fmcjesdadc1: Added clock constraint for the ADC path 2016-01-22 15:46:20 +02:00
Adrian Costina dca39c26f9 ad6676evb: Added clock constraint for the ADC path 2016-01-22 15:45:16 +02:00
Adrian Costina 9cd0378003 fmcadc2: Added clock constraint for the ADC path 2016-01-22 15:44:04 +02:00
Adrian Costina 7013b319b0 motcon2_fmc: Fixed reset connection for cpack cores 2015-12-22 12:03:34 +02:00
Adrian Costina 34b832e22a fmcomms6: Fixed reset connection for cpack core 2015-12-16 10:36:33 +02:00
Adrian Costina 35f6bd16e9 fmcomms5: Fixed reset connection for cpack core 2015-12-16 10:34:36 +02:00
Adrian Costina 6e549171f0 fmcomms5: Connected the clk input of the ad9361 to l_clk 2015-12-02 14:43:44 +02:00
Adrian Costina 2309c4d83c Makefiles: Removed " from path 2015-11-27 14:02:46 +02:00
Adrian Costina 159f6c1216 Makefiles: Updated Makefiles
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
Istvan Csomortani 36febf8591 Merge branch 'master' into dev
Conflicts:
	library/axi_ad9361/axi_ad9361_ip.tcl
	library/axi_dmac/Makefile
	library/axi_dmac/axi_dmac_constr.ttcl
	library/axi_dmac/axi_dmac_ip.tcl
	library/common/ad_tdd_control.v
	projects/daq2/common/daq2_bd.tcl
	projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
	projects/fmcomms2/zc706pr/system_project.tcl
	projects/fmcomms2/zc706pr/system_top.v
	projects/usdrx1/common/usdrx1_bd.tcl

This merge was made, to recover any forgotten fixes from master,
before creating the new release branch. All conflicts were reviewed
and resolved.
2015-11-26 13:38:11 +02:00
Adrian Costina ea57b3c03c daq2: A10GX, add project specific IP search paths 2015-11-25 10:58:36 +02:00
Adrian Costina e8a595b81e fmcjesdadc1: Updated a5soc design 2015-11-24 15:39:52 +02:00
Adrian Costina fd3910a915 fmcjesdadc1: Updated a5gt design 2015-11-24 15:39:21 +02:00
Adrian Costina 9281eb2c33 fmcjesdadc1: Updated common altera design 2015-11-24 15:38:58 +02:00
Adrian Costina a81625e1fa daq2: Updated a10gx project 2015-11-24 13:28:53 +02:00
Adrian Costina 605a0768e0 arradio: Updated c5soc project 2015-11-24 13:27:44 +02:00
Adrian Costina a0e67aad56 c5soc: Updated common design 2015-11-24 13:22:01 +02:00
Istvan Csomortani c051a578e5 fmcomms2: Delete unnecessary clock definition
The two clocks, rx_clk and ad9361_clk, are the same.
2015-11-20 19:35:37 +02:00
Rejeesh Kutty c15c82d9d1 ccpci- remove ps7 ddr hp0 access 2015-11-19 16:42:02 -05:00
Rejeesh Kutty 4603bd222b ccpci- set pcie io after ip 2015-11-19 16:42:01 -05:00
Rejeesh Kutty 95af462409 ccpci- loc by pin-name is ignored 2015-11-19 16:42:00 -05:00
Rejeesh Kutty 0f8d427aef ccpci- remove ila 2015-11-19 16:41:58 -05:00
Rejeesh Kutty 9cfbf0ea61 ccpci- add axi spi/gpio 2015-11-19 16:41:57 -05:00
Rejeesh Kutty a1601a03d6 pzsdr: added ad9361 clock out 2015-11-16 15:55:56 -05:00
Rejeesh Kutty 8aefe569b8 pzsdr: output ad9361 clock out to fan io 2015-11-16 15:54:30 -05:00
Rejeesh Kutty 597e9eae84 pzsdr: added ad9361 clock out 2015-11-16 15:53:29 -05:00
Rejeesh Kutty a6f44949d6 daq3: updates 2015-11-13 13:17:11 -05:00
Adrian Costina c88cbf78af fmcomms5: Added wfifo at the between AD9361 and cpack core 2015-11-13 15:50:32 +02:00
Istvan Csomortani bec4c8da84 pzsdr: Update Make files 2015-11-11 11:16:05 +02:00
Istvan Csomortani 2345d29663 fmcomms2: Update make files 2015-11-11 11:15:45 +02:00
Istvan Csomortani a936ad607f fmcomms2/zc706: Delete unused files from file list 2015-11-11 11:14:58 +02:00
Istvan Csomortani c7e86528d6 fmcomms2/zc706: Cosmetic changes on constraints file 2015-11-11 11:14:16 +02:00
Istvan Csomortani 6197a82c80 fmcomms2/common: Add the util_tdd_sync module 2015-11-11 11:07:15 +02:00
Adrian Costina 5cc97c78d3 Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries 2015-11-10 09:32:50 +02:00
Istvan Csomortani ef9bdf6ec9 adi_project: Regenerate the layout of the IP Integrator subsystem design. 2015-11-09 11:01:10 +02:00
Rejeesh Kutty 1d6254fdec pzsdr/ccbrk: loopback board support 2015-11-06 11:34:21 -05:00
Adrian Costina afc4274ee3 common scripts: Changed the resulting hdf file to system_top_bad_timing, if design doesn't meet timing. 2015-11-06 16:01:19 +02:00
Adrian Costina 0c7c0f2cd8 common scripts: Change the name of the generated HDF if the design doesn't meet timing 2015-11-05 18:41:51 +02:00
Rejeesh Kutty 11718291cf pzsdr/ccfmc- add single loopback core 2015-11-05 11:28:38 -05:00
Rejeesh Kutty 9e27a60478 pzsdr/ccfmc- single loopback core 2015-11-05 11:28:33 -05:00
Adrian Costina e36f27b061 daq2: Update A10GX project, with the latest changes.
Works with up to 64k samples
2015-11-04 14:54:09 +02:00
Adrian Costina 83399ef6ee a10gx: Updated common project to work with Linux (enabled MMU) 2015-11-04 13:35:52 +02:00
Lars-Peter Clausen a0039ed4fe ccfmc: Launch HDMI data on falling edge
The ADV7511 captures data on the rising edge, so make sure to launch data
on the falling edge. This fixes some issues with image stability.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-11-03 10:59:13 +01:00
Rejeesh Kutty 6dddac5d94 ccfmc- missing board io 2015-11-02 15:45:14 -05:00