Commit Graph

12 Commits (d949936a1b49d0e13d56720bd72ffa5a51844126)

Author SHA1 Message Date
Laszlo Nagy fe58a5fb47 adrv9009zu11eg/adrv2crr_fmcomms8: Add clock buffers for core clocks
The IBUFGDS primitive is deprecated in UltraScale devices.

Signed-off-by: Laszlo Nagy <laszlo.nagy@analog.com>
2021-11-11 17:33:10 +02:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Sergiu Arpadi 40baa63f0f adrv2crr_fmcomms8: Fix system_top.v 2021-03-19 17:56:28 +02:00
Sergiu Arpadi 6f2f2b8626 makefile: Regenerate make files 2021-01-20 01:02:56 +02:00
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
2021-01-20 01:02:56 +02:00
Istvan Csomortani e41ba7f6f5 adrv9009zu11eg: Use adi_project_create instead of adi_project 2021-01-15 15:26:43 +02:00
Adrian Costina ecd880d44c adrv9009zu11eg:fmcomms8: Fix SPI timing constraint 2020-11-05 17:42:41 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific
Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Adrian Costina c4b94fc564 adrv9009zu11eg: Add S JESD204 parameter for the projects 2020-02-18 11:19:02 +02:00
Adrian Costina 645696e5b4 adrv9009zu11eg: Extend SPI connection to the PL HD PINS expansion 2020-02-18 11:19:02 +02:00
Adrian Costina d2817863a1 adrv9009zu11eg: Add FMCOMMS8 support 2020-02-18 11:19:02 +02:00