Lars-Peter Clausen
0360e8587e
Connect JESD204 interrupts
...
Connect the ADI JESD204 link layer peripheral interrupt signals in all
projects.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-07-05 14:37:50 +02:00
Adrian Costina
b7ca17f02b
scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects
2017-06-07 12:06:50 +03:00
Istvan Csomortani
50cdb6db67
Merge branch 'jesd204' into dev
2017-05-31 20:44:32 +03:00
Istvan Csomortani
84b2ad51e2
license: Add some clarification to the header license
2017-05-31 18:18:56 +03:00
Istvan Csomortani
85ebd3ca01
license: Update license terms in hdl source files
...
Fix a few gramatical error, fix the path of the top level license
files.
2017-05-29 09:55:41 +03:00
Lars-Peter Clausen
0ec92d3153
daq2: Convert to ADI JESD204
...
Convert the DAQ2 project to the ADI JESD204 link layer cores. The change is
very straight forward, but a matching change on the software side is
required.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Rejeesh Kutty
36037a76f8
kcu105- vivado now depends on order of constraints?
2017-05-19 11:21:36 -04:00
Istvan Csomortani
9055774795
all: Update license for all hdl source files
...
All the hdl (verilog and vhdl) source files were updated. If a file did not
have any license, it was added into it. Files, which were generated by
a tool (like Matlab) or were took over from other source (like opencores.org),
were unchanged.
New license looks as follows:
Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
Each core or library found in this collection may have its own licensing terms.
The user should keep this in in mind while exploring these cores.
Redistribution and use in source and binary forms,
with or without modification of this file, are permitted under the terms of either
(at the option of the user):
1. The GNU General Public License version 2 as published by the
Free Software Foundation, which can be found in the top level directory, or at:
https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html
OR
2. An ADI specific BSD license as noted in the top level directory, or on-line at:
https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
2017-05-17 11:52:08 +03:00
Istvan Csomortani
b92703b59f
daq2: Fix typo
2017-04-24 15:44:45 +03:00
Istvan Csomortani
871cfa7e5b
daq2/kcu105: Update tcl command for IP configuration
2017-04-24 11:50:35 +03:00
Istvan Csomortani
1c23cf4621
all: Update verilog files to verilog-2001
2017-04-13 11:59:55 +03:00
Rejeesh Kutty
fb4a583613
projects/system_bd- adc/dac fifo board designs
2017-02-27 16:06:39 -05:00
Rejeesh Kutty
edd5e9570f
file renamed; sed output; fingers crossed
2017-02-22 15:56:37 -05:00
Rejeesh Kutty
273073a584
daq2/kcu105- xcvr procedure
2016-10-10 11:12:47 -04:00
Rejeesh Kutty
ce1fed1ce6
dmafifo- adc/dac split
2016-08-16 12:54:39 -04:00
Rejeesh Kutty
5d93e542ed
daq2-kcu105: 2016.2 updates
2016-08-11 10:00:41 -04:00
Istvan Csomortani
0cd608a7e2
lib_refactoring: Update Make files
2016-08-08 16:38:38 +03:00
Istvan Csomortani
df36902713
lib_refactoring: Fix path of the IO macros
2016-08-08 15:07:19 +03:00
Adrian Costina
d60bce654c
Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools
2016-08-05 15:16:04 +03:00
Rejeesh Kutty
e42b4ea378
hdlmake- updates
2016-08-04 13:28:25 -04:00
Istvan Csomortani
7ca8e10004
make: Update Make files
2016-08-01 14:24:48 +03:00
Rejeesh Kutty
39a5534e00
hdlmake- updates
2016-07-21 16:10:38 -04:00
Rejeesh Kutty
3006c5a223
make updates
2016-04-11 16:14:59 -04:00
Adrian Costina
9d2b8809df
Makefiles: Updated Makefiles
2015-10-23 10:44:27 +03:00
Istvan Csomortani
a679251d7d
Makefiles: Update Make
2015-09-09 17:13:19 +03:00
Rejeesh Kutty
90e4cadf4b
daq2/kcu105- xcvr pin loc
2015-08-27 12:40:44 -04:00
Rejeesh Kutty
7c8e56cb09
daq2/kcu105- pin loc is now all errors
2015-08-27 11:18:00 -04:00
Rejeesh Kutty
89c7a4de79
daq2/kcu105- parameter changes
2015-08-27 11:18:00 -04:00
Istvan Csomortani
57cfb7cfb1
hdl/library: Update the IP parameters
...
The following IP parameters were renamed:
PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
2015-08-19 14:11:47 +03:00
Adrian Costina
a7da779b94
Makefile: Updated Makefiles
2015-07-16 18:19:42 +03:00
Istvan Csomortani
46fa91d5be
Makefile: Update Make files
2015-07-03 18:08:57 +03:00
Lars-Peter Clausen
6862655b0d
Add .gitattributes file
...
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
Lars-Peter Clausen
6b9906b22b
Refresh Makefiles
...
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Adrian Costina
c19749361d
Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
...
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Istvan Csomortani
15618c9edf
daq2 : Integrate the DACFIFO into the supported projects.
...
+ All pack/unpack logic is made by the cpack and upack modules.
+ The DAC FIFO is integrated between the TX DMA and cpack.
+ All the top files are updated, all the projects compiled successfully.
2015-05-11 12:20:50 +03:00
Adrian Costina
949abcdc8f
Makefile: Updated makefiles so that the project recipe does not depend on lib
2015-05-06 14:58:29 +03:00
Adrian Costina
a61a195e3f
Makefiles: Updated makefiles to add the new constraints as dependecies
2015-04-23 11:16:39 +03:00
Adrian Costina
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
...
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
Rejeesh Kutty
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
Rejeesh Kutty
4f7f109056
util_adcfifo: added
2015-04-07 16:08:38 -04:00
Adrian Costina
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
Rejeesh Kutty
283427647b
makefile: added
2015-04-01 16:29:00 -04:00
Rejeesh Kutty
b1b46ed820
daq2: move intrs into ipi
2015-03-12 16:17:04 -04:00
Rejeesh Kutty
543bfe9d44
daq2/kcu105: removed hdmi/spdif
2015-03-10 16:15:16 -04:00
Rejeesh Kutty
104782af87
daq2/kcu105: base system updates
2015-03-09 16:09:07 -04:00
Rejeesh Kutty
1220b53c8c
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
Rejeesh Kutty
75c4228987
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
Rejeesh Kutty
847c2e049a
kcu105: removed lutram constraints
2015-02-26 16:09:55 -05:00