pluto_hdl_adi

Commit Graph

Author	SHA1	Message	Date
stefan.raus	37238916df	Testbenches: Unify and optimize HDL testbenches Create a common 'run_tb.sh' script to be called by every testbench. Unify file and testbenches names. Fix util_pack/cpack_tb. Add parameters '-batch' and '-gui' for modelsim and xsim simulators (default is gui) Add ascript for that generates output in xml format (used by CI tools).	2021-05-07 19:53:14 +03:00
Istvan Csomortani	8b8d346193	jesd204: Update testbench with the new file names	2018-04-11 15:09:54 +03:00
Lars-Peter Clausen	4df841addc	jesd204: Add soft logic PCS Add soft logic PCS that performs 8b10b encoding for TX and character pattern alignment and 8b10b decoding for RX. The modules are intended to be used in combination with a transceiver that does not have these features implemented in hard logic PCS. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>	2017-08-21 11:09:42 +02:00

Author

SHA1

Message

Date

stefan.raus

37238916df

Testbenches: Unify and optimize HDL testbenches

Create a common 'run_tb.sh' script to be called by every testbench.
Unify file and testbenches names.
Fix util_pack/cpack_tb.
Add parameters '-batch' and '-gui' for modelsim and xsim simulators (default is gui)
Add ascript for that generates output in xml format (used by CI tools).

2021-05-07 19:53:14 +03:00

Istvan Csomortani

8b8d346193

jesd204: Update testbench with the new file names

2018-04-11 15:09:54 +03:00

Lars-Peter Clausen

4df841addc

jesd204: Add soft logic PCS

Add soft logic PCS that performs 8b10b encoding for TX and character
pattern alignment and 8b10b decoding for RX.

The modules are intended to be used in combination with a transceiver that
does not have these features implemented in hard logic PCS.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>

2017-08-21 11:09:42 +02:00

3 Commits (cdb9a0af2b6c45d1745ca6296ca79205a5758d12)