Iacob_Liviu
|
482f0489a3
|
scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
|
2022-08-08 13:52:54 +03:00 |
Filip Gherman
|
6a92bd5925
|
adrv9371x: Parameterize JESD204 configuration values
|
2022-01-12 16:05:48 +02:00 |
Adrian Costina
|
9093a8c428
|
library: Move ad_iobuf to the common library, as it's not Xilinx specific
Updated all system_project and Makefiles
|
2020-11-02 16:13:35 +02:00 |
AndreiGrozav
|
44deaadb4a
|
adrv9371: Add decimation and interpolation filters
|
2019-08-20 16:24:47 +03:00 |
Istvan Csomortani
|
a589753d92
|
project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl
|
2019-06-29 06:53:51 +03:00 |
Istvan Csomortani
|
43725429ac
|
adi_project: Rename the process adi_project_xilinx to adi_project
|
2019-06-29 06:53:51 +03:00 |
Adrian Costina
|
b7ca17f02b
|
scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects
|
2017-06-07 12:06:50 +03:00 |
Rejeesh Kutty
|
c598e84258
|
remove processing order (no clock def dependency)
|
2017-02-22 16:02:08 -05:00 |
Rejeesh Kutty
|
edd5e9570f
|
file renamed; sed output; fingers crossed
|
2017-02-22 15:56:37 -05:00 |
Istvan Csomortani
|
df36902713
|
lib_refactoring: Fix path of the IO macros
|
2016-08-08 15:07:19 +03:00 |
Istvan Csomortani
|
3859cba186
|
adrv9371x/zc706: Add PL_DDR FIFO to the design
|
2016-05-27 14:13:55 +03:00 |
Rejeesh Kutty
|
f92e8509bb
|
adrv9371x- added
|
2016-05-20 11:46:25 -04:00 |