Commit Graph

563 Commits (cbb3e8ddc53443c559aea83f791d712fca8447a9)

Author SHA1 Message Date
Rejeesh Kutty ca36ef0e02 Merge remote-tracking branch 'origin/hdl_2014_r2' into dev 2014-12-11 11:26:30 -05:00
Rejeesh Kutty d82952b22a daq2/kcu105: lane assignment fixes 2014-12-11 11:19:38 -05:00
Adrian Costina 7dddac84f1 motcon1_fmc: Fixed issue introduced by merge 2014-12-11 14:32:32 +02:00
Istvan Csomortani 9e8fd8ed9e base_design: External IIC reset is connected to Vcc
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:14:54 +02:00
Istvan Csomortani caa0268434 base_design: External IIC reset is connected to Vcc
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:13:07 +02:00
Adrian Costina 86ad9213e0 fmcomms2: Update c5soc system_timing script 2014-12-10 17:54:11 +02:00
Adrian Costina 6ac774a9dd fmcjesdadc1: Update altera system_timing script 2014-12-10 17:53:29 +02:00
Rejeesh Kutty e7c920bbd9 fmcomms2/ml605: compilation fixes 2014-12-09 14:32:39 -05:00
Rejeesh Kutty 4cf435ee39 fmcomms2/ml605: compilation fixes 2014-12-09 14:32:39 -05:00
Rejeesh Kutty 8b41034825 fmcomms2/ml605: compilation fixes 2014-12-09 14:32:39 -05:00
Rejeesh Kutty 842ba19aaa fmcomms2/ml605: compilation fixes 2014-12-09 14:31:12 -05:00
Rejeesh Kutty d7a6b5e6d0 fmcomms2/ml605: compilation fixes 2014-12-09 14:31:11 -05:00
Rejeesh Kutty d57b6b01c6 fmcomms2/ml605: compilation fixes 2014-12-09 14:31:10 -05:00
Michael Hennerich 9103f6706e Merge branch 'hdl_2014_r2' of https://github.com/analogdevicesinc/hdl into hdl_2014_r2 2014-12-09 17:38:37 +01:00
Michael Hennerich 138e789fb6 projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
sys_concat_intc: don't reset NUM_PORTS to 6

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-09 17:38:16 +01:00
Rejeesh Kutty 772edbae20 fmcadc4: fifo updates 2014-12-09 10:43:02 -05:00
Rejeesh Kutty d149890426 fmcadc4: fifo updates 2014-12-09 10:43:02 -05:00
Rejeesh Kutty dad0745fbe fmcadc4: fifo updates 2014-12-09 10:43:02 -05:00
Rejeesh Kutty 987257e3c3 fmcadc4: fifo updates 2014-12-09 10:43:01 -05:00
Rejeesh Kutty 0c6cbdd303 fmcadc4: fifo updates 2014-12-09 10:38:51 -05:00
Rejeesh Kutty f044ab94e0 fmcadc4: fifo updates 2014-12-09 10:38:50 -05:00
Rejeesh Kutty e2a9502e1e fmcadc4: fifo updates 2014-12-09 10:38:49 -05:00
Rejeesh Kutty a2607a8057 fmcadc4: fifo updates 2014-12-09 10:38:47 -05:00
Istvan Csomortani a6b7b9d880 ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl 2014-12-09 16:20:39 +02:00
Istvan Csomortani 2e4640d5c5 ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl 2014-12-09 16:17:46 +02:00
Istvan Csomortani 4d28825741 ad9467_kc705: Fix typos. 2014-12-09 13:46:51 +02:00
Istvan Csomortani a0d5e7862e ad9467_kc705: Fix typos. 2014-12-09 12:07:49 +02:00
Istvan Csomortani 915ee7a268 fmcjesdadc1_kc705: Connect the SPI interrupt to the controller 2014-12-09 11:54:16 +02:00
Istvan Csomortani ee04eb637b ad9467_kc705: Fix interrupts 2014-12-09 11:54:08 +02:00
Istvan Csomortani 37c3af9929 fmcjesdadc1_kc705: Connect the SPI interrupt to the controller 2014-12-09 11:51:36 +02:00
Istvan Csomortani b83299c606 ad9467_kc705: Fix interrupts 2014-12-09 11:48:46 +02:00
Rejeesh Kutty 1b4a4bc06e daq3: compilation fixes - latest changes 2014-12-08 14:51:52 -05:00
Rejeesh Kutty c0d588ba8c daq3: compilation fixes - latest changes 2014-12-08 14:51:52 -05:00
Rejeesh Kutty 26d72d306e daq3: compilation fixes - latest changes 2014-12-08 14:51:51 -05:00
Rejeesh Kutty abff7097f6 daq3: compilation fixes - latest changes 2014-12-08 14:50:03 -05:00
Rejeesh Kutty 8a72a6a0dc daq3: compilation fixes - latest changes 2014-12-08 14:49:52 -05:00
Rejeesh Kutty 7c3ed75b79 daq3: compilation fixes - latest changes 2014-12-08 14:49:40 -05:00
Rejeesh Kutty 0a8fabe874 Merge branch 'hdl_2014_r2' into dev
Conflicts:
	projects/fmcadc5/common/fmcadc5_bd.tcl
	projects/motcon1_fmc/common/motcon1_fmc_bd.tcl
	projects/motcon1_fmc/zed/system_constr.xdc
	projects/motcon1_fmc/zed/system_top.v
2014-12-08 11:32:13 -05:00
Rejeesh Kutty 82b9ebe23d remove replaced projects 2014-12-08 10:45:12 -05:00
Rejeesh Kutty 19e4950b72 renamed to match official names 2014-12-08 10:44:15 -05:00
Adrian Costina a558d4000d motcon1_fmc: Added XADC to the project, the external muxing is controlled by generic GPIO, not XADC GPIO 2014-12-08 11:27:47 +02:00
Paul Cercueil d5572eaa49 ad9265_fmc: Fix unconnected DMA irq
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-12-05 17:44:47 +01:00
Michael Hennerich 84174460bb projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich bb6cc40902 projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich 8e4d0a1b60 projects/common: KCU105 VC707 KC705 sync microblaze core defaults
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich 7e18162632 projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:48:37 +01:00
Adrian Costina e6e9c0058d motor_control: Updated project to Vivado 14.2. Temporary removed XADC
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:53:23 +02:00
Adrian Costina 4c05e8de5d motor_control: Updated project to Vivado 14.2. Temporary removed XADC
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
Istvan Csomortani 11f41d1dff zynq_plddr3: Fix PLDDR3's Reset Generator
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
Istvan Csomortani 34ffa15b12 zynq_plddr3: Fix PLDDR3's Reset Generator
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00