Istvan Csomortani
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42874bfe81
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prcfg_library: Major update
Get rid of the QPSK symbol wrapper for now. The DMA data path is using the 2 LSB bits.
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2014-11-18 10:05:52 +02:00 |
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Istvan Csomortani
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bf62665c56
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prcfg_qpsk: Add Simulink model
Matlab version used: R2014a, HDL Coder 3.3
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2014-11-12 15:44:38 +02:00 |
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Istvan Csomortani
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d596d71285
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prcfg_qpsk: Swap the I/Q pair nets between the filter and the demodulator.
This fix the wrong symbol mapping issue.
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2014-10-31 12:14:52 +02:00 |
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Istvan Csomortani
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eb520b1f75
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prcfg_qpsk: Major update
Add a symbol wrapper to the logic. Wraps the 32 bit data to 2 bit symbols.
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2014-10-31 12:10:59 +02:00 |
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Istvan Csomortani
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ea194755e1
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prcfg: Upgrade the QPSK logic
Regenerate the qpsk logic, with the new HDL coder, and modify the design to support the new files.
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2014-10-31 11:59:29 +02:00 |
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Istvan Csomortani
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9dfbf4a9a6
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prcfg: Update the prcfg logic to the new ad9361 interface
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2014-08-05 17:54:37 +03:00 |
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Istvan Csomortani
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75e624ef15
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prcfg_lib: Flop the status and mode nets
Flop the status and mode nets in case of BIST and QPSK configurations.
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2014-07-08 12:23:48 +03:00 |
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Istvan Csomortani
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7e5748374d
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prcfg_lib: Fixed prbs generator for QPSK
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2014-07-02 18:14:35 +03:00 |
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Istvan Csomortani
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89961c8dd7
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prcfg_lib: Update the PR libraries
+ Flop the control nets too inside the adc/dac module
+ Flop the gpio_out in prcfg_top
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2014-06-13 20:35:35 +03:00 |
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Istvan Csomortani
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ea22d29862
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prcfg: Initial check in of PR modules
Initial check in of the partial reconfiguraiton modules.
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2014-06-05 14:58:14 +03:00 |