Commit Graph

14 Commits (c871a3a9ee3163839576ec9961cb2d0bbae1bcb8)

Author SHA1 Message Date
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
2021-01-20 01:02:56 +02:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Arpadi 0680e44330 system_id: deployed ip 2019-08-06 16:53:11 +03:00
Istvan Csomortani 58d55f61db fmcomms11: Add desciption how to swap memory resource for the FIFOs 2019-06-10 11:23:41 +03:00
Istvan Csomortani 94dc848292 fmcomms11: Move the FIFO address variables into system_bd
These variables can vary in function of the available memory resources
of the FPGA carrier board.
2019-06-10 11:23:41 +03:00
Istvan Csomortani cf03e216fe fmcomms11: Update the project with the new TPL 2019-05-16 13:26:58 +03:00
Istvan Csomortani eba1975144 fmcomms11: Initial commit 2019-05-16 13:26:58 +03:00
Istvan Csomortani 43496cf80a fmcomms11: Move project to a feature branch 2018-04-13 18:22:15 +03:00
Rejeesh Kutty fb4a583613 projects/system_bd- adc/dac fifo board designs 2017-02-27 16:06:39 -05:00
Rejeesh Kutty edd5e9570f file renamed; sed output; fingers crossed 2017-02-22 15:56:37 -05:00
Rejeesh Kutty ce1fed1ce6 dmafifo- adc/dac split 2016-08-16 12:54:39 -04:00
Shrutika Redkar ad491ec04a updated tcl files after inclusion of ad9162 core 2016-06-30 13:26:16 -04:00
Rejeesh Kutty 1746701d45 fmcomms11- updates 2016-06-10 14:20:43 -04:00
Rejeesh Kutty 8f00760c13 fmcomms11- initial commit 2016-06-10 14:20:43 -04:00