Istvan Csomortani
|
3a0d1282b7
|
Fix the remaining issues
- Swap the IO locations of ports vsync and hsync
- Change the mem_interconnect optimization strategy to Maximize
Performance
|
2014-03-20 14:36:01 +02:00 |
|
Istvan Csomortani
|
7cdab9b5b0
|
Change the internal clock generator to Clock Wizard
- Using a Clock Wizard Module, in place of the DDR Controler's MMCM for internal clock
generation.
|
2014-03-18 17:24:45 +02:00 |
Rejeesh Kutty
|
5c3b65d01b
|
adv7511: kc705/ac701 updates
|
2014-03-06 09:36:50 -05:00 |
|
Rejeesh Kutty
|
360f10395a
|
initial checkin
|
2014-03-03 13:42:25 -05:00 |