Adrian Costina
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942d69a30c
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Makefiles: Change MMU enabling parameter for altera designs from MMU to NIOS2_MMU
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2017-04-18 10:57:16 +03:00 |
Istvan Csomortani
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1c23cf4621
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all: Update verilog files to verilog-2001
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2017-04-13 11:59:55 +03:00 |
Rejeesh Kutty
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66a5d44a18
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a5gte- add constraints for tq
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2017-03-21 10:53:31 -04:00 |
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Adrian Costina
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9fb7db97da
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a5gte: Fixed timing violations
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2016-12-13 10:30:24 +02:00 |
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Adrian Costina
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8ebc8fe4e2
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updated makefiles
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2016-12-09 23:06:41 +02:00 |
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Adrian Costina
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0b0aa8e6c0
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Makefile: Add MMU option to altera makefiles
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2016-08-11 17:46:54 +03:00 |
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Adrian Costina
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d60bce654c
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Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools
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2016-08-05 15:16:04 +03:00 |
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Rejeesh Kutty
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eaf4d4a19d
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makefile updates
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2016-06-10 14:26:14 -04:00 |
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Adrian Costina
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9d2b8809df
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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Adrian Costina
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4d7ff0ed15
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a5gte: Update ethernet connections
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2015-07-27 16:05:26 +03:00 |
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Rejeesh Kutty
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a8a71b4971
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alt-tq: common file
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2015-06-04 11:00:25 -04:00 |
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Rejeesh Kutty
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f81d22a17a
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altera- common timing check
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2015-06-04 10:56:32 -04:00 |
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Adrian Costina
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050f17e034
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a5gt3: common: corrected naming in pin assignments. added reset signal from FPGA2
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2015-01-23 12:30:16 +02:00 |
Lars-Peter Clausen
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50faf0c53a
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Remove executable flags from non-exectuable files
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2014-09-09 15:05:06 +02:00 |
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Rejeesh Kutty
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72f31370ef
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a5gt: ethernet-fpga lvds mode
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2014-09-04 11:19:25 -04:00 |