Commit Graph

136 Commits (b9e2c5659f9afa789e99f91c24ec3ded7fad85ee)

Author SHA1 Message Date
Rejeesh Kutty 65d9f08763 zc706: mig 2014.4 2015-01-09 14:12:52 -05:00
Rejeesh Kutty 868df1aac8 zc706: mig 2014.4 2015-01-09 14:12:51 -05:00
Adrian Costina f566268db5 zed_common: Updated common to 2014.4 2015-01-08 11:59:26 +02:00
Rejeesh Kutty eb569b991d dmafifo- remove util fifo setup 2015-01-06 16:23:14 -05:00
Rejeesh Kutty 9e707d8a33 rfifo: wrapper updates 2015-01-06 16:17:33 -05:00
Rejeesh Kutty a944deebd5 wfifo: wrapper updates 2015-01-06 16:17:25 -05:00
Rejeesh Kutty 61ba4f4357 rfsom: updated to rfsom 2014-12-23 14:03:58 -05:00
Rejeesh Kutty 614dfcd93c rfsom: updated to rfsom 2014-12-23 14:03:57 -05:00
Rejeesh Kutty ee52602c89 rfsom: initial commit 2014-12-23 14:03:55 -05:00
Rejeesh Kutty 0de1a38245 zc706: 2014.4 update 2014-12-23 14:03:52 -05:00
Adrian Costina 71baa129a7 VC707: Fixed linear flash timings 2014-12-19 15:45:14 +02:00
Istvan Csomortani 59e610be09 zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc 2014-12-17 19:07:43 +02:00
Rejeesh Kutty 77fa96fa67 plddr3: sys-rst from board pushbutton 2014-12-15 12:58:54 -05:00
Rejeesh Kutty ed7f8b4908 plddr3: sys-rst from board pushbutton 2014-12-15 12:58:44 -05:00
Istvan Csomortani caa0268434 base_design: External IIC reset is connected to Vcc
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:13:07 +02:00
Rejeesh Kutty e7c920bbd9 fmcomms2/ml605: compilation fixes 2014-12-09 14:32:39 -05:00
Istvan Csomortani a6b7b9d880 ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl 2014-12-09 16:20:39 +02:00
Michael Hennerich 7e18162632 projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:48:37 +01:00
Istvan Csomortani 34ffa15b12 zynq_plddr3: Fix PLDDR3's Reset Generator
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00
Michael Hennerich 3cc890e604 projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:49:09 +01:00
Michael Hennerich 3bc9b25e96 projects/common: KCU105 VC707 KC705 sync microblaze core defaults
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:47:02 +01:00
Istvan Csomortani 12f1873e17 kc705_base: Define sys_addr_mem_seg for dmafifo 2014-11-26 15:08:55 +02:00
Istvan Csomortani c0f4d7e2b5 mitx045_common: Definition file patch
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.

NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
Rejeesh Kutty cdd1408d3c dmafifo: parameterized address width 2014-11-20 09:28:02 -05:00
Istvan Csomortani e3378cd6cb mitx045_board_definition: revert old board definition file
Revert commit 4f6aa159b8. Those changes won't solve the issue.
mitx045.xml is the supported version under 2013.4
2014-11-18 10:05:55 +02:00
Istvan Csomortani 5baa015246 kc705_base: Delete timing constraints 2014-11-13 16:30:37 +02:00
Rejeesh Kutty 074662a622 dmafifo: common interface with fifo2s 2014-11-12 15:24:31 -05:00
Rejeesh Kutty c6af2696b3 plddr3: internal buswidth/clock conversion 2014-11-12 14:43:48 -05:00
Adrian Costina 05ed98f884 common: Updated common constratins for ac701, kc705, vc707, zc702 2014-11-11 12:35:44 +02:00
Rejeesh Kutty 2d9a529ab8 kcu105: ddr - 800M 2014-11-06 16:50:37 -05:00
Adrian Costina 4634a4f868 vc707: Added linear flash to the base design 2014-11-05 17:18:40 +02:00
Istvan Csomortani 4f815b99a1 kc705_base: Fix sys_concat_intc input connections
All the unused input pins need to be connected to ground.
2014-11-03 13:02:08 +02:00
Istvan Csomortani f7588131da ac701_base: Interrupt update 2014-11-03 13:02:04 +02:00
Istvan Csomortani b92636c6eb kc705_base: Interrupt update 2014-11-03 13:02:03 +02:00
Istvan Csomortani 16cdae3001 mitx045_base: Delete unnecessary timing constraints. 2014-10-31 11:50:49 +02:00
Istvan Csomortani 67bec719f7 mitx045_base: Interrupt update 2014-10-31 11:45:33 +02:00
Rejeesh Kutty 56859ad4c9 sys_dmafifo: use internal memory 2014-10-30 15:26:28 -04:00
Istvan Csomortani 7ae003cf82 zed_base: Interrupt update 2014-10-30 19:00:05 +02:00
Istvan Csomortani ba53e156e3 ZC702_base: Interrupt update 2014-10-30 18:39:49 +02:00
Rejeesh Kutty f595b86576 kcu105: lutram constraints for ies 2014-10-30 11:20:27 -04:00
Rejeesh Kutty 4c0e4d280f dmafifo: internal version- light duty 2014-10-30 11:12:13 -04:00
Rejeesh Kutty 360e7104b6 dmafifo: axi version- heavy duty 2014-10-30 11:12:12 -04:00
Rejeesh Kutty 2e01ad2eec ad9625_fmc/zc706: ps7 interrupt updates 2014-10-29 12:13:44 -04:00
Rejeesh Kutty f83622a2e6 daq2/kcu105: interrupt updates 2014-10-28 15:51:42 -04:00
Rejeesh Kutty 4788d09620 vc707: interrupt updates 2014-10-28 15:42:55 -04:00
Istvan Csomortani a870603db5 common_bd: Update the common block designs to the new IRQ path
Avoid the use of xil_concat module by using the ad_interrupts.
2014-10-27 19:44:25 +02:00
Rejeesh Kutty d1e3993bd0 kcu105: daq2 updates 2014-10-27 09:59:56 -04:00
Rejeesh Kutty d471b61f3e fifo: merge zynq and non-zynq 2014-10-27 09:59:54 -04:00
Istvan Csomortani 10b898a62d zed_base: Fix IRQ layout.
Just a temporally fix of IRQ layout.
2014-10-27 14:46:26 +02:00
Rejeesh Kutty 43cdafe1e2 kcu105: iic-rstn removed 2014-10-22 16:33:52 -04:00