Commit Graph

6 Commits (ae7ec823349f60c1d8a5ddb8f39dfb89527fc531)

Author SHA1 Message Date
Adrian Costina 0644edb389 fmcomms8: a10soc: Move RX and Observation to second SDRAM interface
This is an attempt to get full bandwidth without a FIFO
2020-10-26 18:12:14 +02:00
Adrian Costina 6621fbec61 fmcomms8: a10soc: Initial commit 2020-10-26 18:12:14 +02:00
Adrian Costina 4d2e05d5dd fmcomms8: common: In the SPI module, use ad_iobuf instead of a Xilinx primitive 2020-09-25 11:54:12 +03:00
Adrian Costina 50d904934a fmcomms8: Changed the interrupt addresses to be similar with adrv9009zu11eg project 2020-03-06 16:07:02 +02:00
Adrian Costina e51d9372cd fmcomms8: ZCU102: Added DAC FIFO 2020-02-10 11:23:52 +02:00
Adrian Costina 016a1d540d fmcomms8: ZCU102: Initial commit 2020-02-10 11:23:52 +02:00