bcf5bd8137
mitx045: Updated common design to 2015.4
2016-03-15 15:18:31 +02:00
27f5f1dcbe
kc705: Updated common design to 2015.4
2016-03-15 15:17:53 +02:00
eb743e0e03
ac701: Updated common design to 2015.4
2016-03-15 15:17:02 +02:00
d282064103
zc706: Updated common design to 2015.4
2016-03-15 15:16:36 +02:00
71be9519ec
adi_project.tcl: Updated to 2015.4
2016-03-15 15:03:50 +02:00
40fb68dfd5
ad9265, ad9434, ad9467, daq1, daq2, daq3, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1, fmcomms6, fmcomms7, usdrx1: updated common spi module so that spi streaming is possible
2016-03-02 13:39:37 +02:00
becc23a69b
daq2: Modified common spi module so that spi streaming is possible
...
- stop incrementing spi_count after the instruction cycle
2016-03-01 17:25:58 +02:00
f6e64e42b0
kcu105: add ethernet idelaycntrl
2016-02-26 13:19:49 -05:00
8ccd8d87bb
daq2: A10GX, increase analog/digital reset durations
...
- reset the xcvr_rst_cntrl only from the axi_jesd_xcvr
- checked separate RX/TX reset per channel
2016-02-23 11:41:38 +02:00
89f7aadfb1
fmcjesdadc1: A5GT, connected xcvr_rxt_cntrl reset input to the axi_jesd_xcvr reset output
...
This will allow for the transceivers to be reset by the axi_jesd_xcvr core
2016-02-23 11:31:07 +02:00
0f37dd6424
fmcjesdadc1: Fixed project
...
- changed system_project.tcl so that all base designs to be included
- changed DMA properties to take into consideration the new parameter names
- changed reset bridges to asynchronous
- increased maximum burst size of the DMA bridge
- changed the data_width of the memory bus to 256, as with 512 timing violations may occur
- changed base addresses for the base system to be the same as in the previous release
2016-02-19 14:09:57 +02:00
d94f157454
arradio: Changed ADC/DAC DMA address length to 24 bit
2016-02-16 15:27:51 +02:00
43e03ca6f7
arradio: Updated project
...
- made the reset bridges asynchronous
- connected the arradio gpio to the CPU interconnect
2016-02-16 14:50:23 +02:00
61f9f72a75
fmcjesdadc1: Updated VC707 project for maximum throughput from DMA to DDR
...
- Increased the DMAs internal FIFO
2016-02-09 12:30:56 +02:00
c431adb793
fmcjesdadc1: Updated KC705 project for maximum throughput from DMA to DDR
...
- Increased the DMA internal FIFO
2016-02-09 12:00:27 +02:00
ad9ecbbbb6
daq2: Updated a10gx project to quartus 15.1.1
2016-02-05 17:43:05 +02:00
e22d5d5c18
daq2: Fix clock constraints for KC705 and VC707
2016-01-22 19:09:57 +02:00
59fbd99fdb
fmcjesdadc1: Added clock constraint for the ADC path
2016-01-22 15:46:20 +02:00
dca39c26f9
ad6676evb: Added clock constraint for the ADC path
2016-01-22 15:45:16 +02:00
9cd0378003
fmcadc2: Added clock constraint for the ADC path
2016-01-22 15:44:04 +02:00
7013b319b0
motcon2_fmc: Fixed reset connection for cpack cores
2015-12-22 12:03:34 +02:00
34b832e22a
fmcomms6: Fixed reset connection for cpack core
2015-12-16 10:36:33 +02:00
35f6bd16e9
fmcomms5: Fixed reset connection for cpack core
2015-12-16 10:34:36 +02:00
6e549171f0
fmcomms5: Connected the clk input of the ad9361 to l_clk
2015-12-02 14:43:44 +02:00
2309c4d83c
Makefiles: Removed " from path
2015-11-27 14:02:46 +02:00
159f6c1216
Makefiles: Updated Makefiles
...
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
36febf8591
Merge branch 'master' into dev
...
Conflicts:
library/axi_ad9361/axi_ad9361_ip.tcl
library/axi_dmac/Makefile
library/axi_dmac/axi_dmac_constr.ttcl
library/axi_dmac/axi_dmac_ip.tcl
library/common/ad_tdd_control.v
projects/daq2/common/daq2_bd.tcl
projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
projects/fmcomms2/zc706pr/system_project.tcl
projects/fmcomms2/zc706pr/system_top.v
projects/usdrx1/common/usdrx1_bd.tcl
This merge was made, to recover any forgotten fixes from master,
before creating the new release branch. All conflicts were reviewed
and resolved.
2015-11-26 13:38:11 +02:00
ea57b3c03c
daq2: A10GX, add project specific IP search paths
2015-11-25 10:58:36 +02:00
e8a595b81e
fmcjesdadc1: Updated a5soc design
2015-11-24 15:39:52 +02:00
fd3910a915
fmcjesdadc1: Updated a5gt design
2015-11-24 15:39:21 +02:00
9281eb2c33
fmcjesdadc1: Updated common altera design
2015-11-24 15:38:58 +02:00
a81625e1fa
daq2: Updated a10gx project
2015-11-24 13:28:53 +02:00
605a0768e0
arradio: Updated c5soc project
2015-11-24 13:27:44 +02:00
a0e67aad56
c5soc: Updated common design
2015-11-24 13:22:01 +02:00
c051a578e5
fmcomms2: Delete unnecessary clock definition
...
The two clocks, rx_clk and ad9361_clk, are the same.
2015-11-20 19:35:37 +02:00
c15c82d9d1
ccpci- remove ps7 ddr hp0 access
2015-11-19 16:42:02 -05:00
4603bd222b
ccpci- set pcie io after ip
2015-11-19 16:42:01 -05:00
95af462409
ccpci- loc by pin-name is ignored
2015-11-19 16:42:00 -05:00
0f8d427aef
ccpci- remove ila
2015-11-19 16:41:58 -05:00
9cfbf0ea61
ccpci- add axi spi/gpio
2015-11-19 16:41:57 -05:00
a1601a03d6
pzsdr: added ad9361 clock out
2015-11-16 15:55:56 -05:00
8aefe569b8
pzsdr: output ad9361 clock out to fan io
2015-11-16 15:54:30 -05:00
597e9eae84
pzsdr: added ad9361 clock out
2015-11-16 15:53:29 -05:00
a6f44949d6
daq3: updates
2015-11-13 13:17:11 -05:00
c88cbf78af
fmcomms5: Added wfifo at the between AD9361 and cpack core
2015-11-13 15:50:32 +02:00
bec4c8da84
pzsdr: Update Make files
2015-11-11 11:16:05 +02:00
2345d29663
fmcomms2: Update make files
2015-11-11 11:15:45 +02:00
a936ad607f
fmcomms2/zc706: Delete unused files from file list
2015-11-11 11:14:58 +02:00
c7e86528d6
fmcomms2/zc706: Cosmetic changes on constraints file
2015-11-11 11:14:16 +02:00
6197a82c80
fmcomms2/common: Add the util_tdd_sync module
2015-11-11 11:07:15 +02:00
5cc97c78d3
Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries
2015-11-10 09:32:50 +02:00
ef9bdf6ec9
adi_project: Regenerate the layout of the IP Integrator subsystem design.
2015-11-09 11:01:10 +02:00
1d6254fdec
pzsdr/ccbrk: loopback board support
2015-11-06 11:34:21 -05:00
afc4274ee3
common scripts: Changed the resulting hdf file to system_top_bad_timing, if design doesn't meet timing.
2015-11-06 16:01:19 +02:00
0c7c0f2cd8
common scripts: Change the name of the generated HDF if the design doesn't meet timing
2015-11-05 18:41:51 +02:00
11718291cf
pzsdr/ccfmc- add single loopback core
2015-11-05 11:28:38 -05:00
9e27a60478
pzsdr/ccfmc- single loopback core
2015-11-05 11:28:33 -05:00
e36f27b061
daq2: Update A10GX project, with the latest changes.
...
Works with up to 64k samples
2015-11-04 14:54:09 +02:00
83399ef6ee
a10gx: Updated common project to work with Linux (enabled MMU)
2015-11-04 13:35:52 +02:00
a0039ed4fe
ccfmc: Launch HDMI data on falling edge
...
The ADV7511 captures data on the rising edge, so make sure to launch data
on the falling edge. This fixes some issues with image stability.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-11-03 10:59:13 +01:00
6dddac5d94
ccfmc- missing board io
2015-11-02 15:45:14 -05:00
cafc80c829
fmcadc5: add programmable io delay
2015-11-02 12:10:18 -05:00
8b95520767
pzsdr/ccfmc- add loopback gpio/gt cores
2015-10-30 18:48:26 -04:00
92b7570864
pzsdr/ccfmc- add ad9517 signals
2015-10-30 10:50:53 -04:00
b3cb84cf91
fmcadc5- added ila
2015-10-29 16:48:21 -04:00
24d76c610a
fmcadc5- fix core connections
2015-10-29 16:47:56 -04:00
ac4091e19e
fmcadc4- add monitor fifo
2015-10-27 14:52:02 -04:00
b5d3d0bd13
usb_fx3: Added axi_usb_fx3 core and DMA to the project
2015-10-27 09:41:18 +02:00
748a2bc87a
fmcadc4- add ila for zc706 only
2015-10-23 14:32:35 -04:00
b2d0f5c56e
fmcadc4- use the same source/name for clocks
2015-10-23 14:32:35 -04:00
9d2b8809df
Makefiles: Updated Makefiles
2015-10-23 10:44:27 +03:00
cb2bda48c0
fmcadc5- gt/ip updates
2015-10-19 09:31:32 -04:00
ed918ec119
imageon - keeping scripts happy
2015-10-16 15:04:02 -04:00
e14e9294c5
project-names -- variables causes scripts to fail- too much parsing
2015-10-16 14:13:56 -04:00
36dd6427fe
pzsdr: Add untracked Makefiles
2015-10-16 13:58:36 +03:00
bbdc693954
pzsdr/all: Update Makefile
2015-10-16 11:57:51 +03:00
08777ca566
fmcadc5- latest board changes
2015-10-15 10:46:07 -04:00
030485de28
fmcadc5- regulators need a switching ref clock?
2015-10-15 10:46:07 -04:00
f966f79e5f
fmcadc5- regulators need a switching ref clock?
2015-10-15 10:46:07 -04:00
199227b78c
fix fmcjesdadc1_bd ILA warning
2015-10-13 10:19:08 -04:00
21737ad7b8
fmcomms2/zc706pr: Update the fifo interface of the PR module
2015-10-13 11:37:44 +03:00
c9a5057b93
library/prcfg : Split data bus to channels
...
Because of the new pack/upack modules on the data path, it makes more sense to split the data interface of the PR modules into separate channels.
The top module will supports max 4 channels.
2015-10-13 11:36:45 +03:00
9bb70e2b69
motcon2_fmc: Updated ZED project
2015-10-09 15:33:31 +03:00
83fb5c742a
motcon2_fmc: Updated project to Vivado 2015.2.1
...
- added cpack cores
- removed controller DMA paths
2015-10-09 13:56:41 +03:00
88e8bef92f
usdrx1: Update ZC706 project
2015-10-09 13:33:45 +03:00
02c0a5f5df
usdrx1: Update project to Vivado 2015.2.1
2015-10-09 13:33:07 +03:00
c83239b014
fmcomms2/zc706pr: Update PR design
...
+ Add system_top.v to design
+ Add pr specific constraints
2015-10-09 13:23:42 +03:00
09be227db9
fmcomms2/zc706pr: Update PR design
...
+ Add system_top.v to design
+ Add pr specific constraints
2015-10-09 13:19:09 +03:00
e4517c0d6a
daq2/common: Connect reset to dac fifo
2015-10-08 16:51:08 +03:00
df88b33946
usb_fx3: Initial commit
...
Only the UART connections are available.
The FMC should not be populated at this time
2015-10-02 09:30:31 +03:00
b93af3c21e
daq3- bd updates
2015-09-30 10:11:49 -04:00
81a1c21553
util_pmod_adc: Reset line changed to active low reset.
2015-09-30 12:33:46 +03:00
5f12c8c7d4
cftl_cip/common: Fix parameter names for dmac
2015-09-30 12:32:48 +03:00
3dc881dbb3
pmods/xfest14: Delete directory
...
This project will not be supported from the next release
2015-09-30 12:25:31 +03:00
e6af671bea
cn0363/zed: Fix DMAC parameter names
2015-09-30 11:31:53 +03:00
4aa4ffc25f
imageon/common: Update cores to Vivado 2015.2
2015-09-29 18:51:46 +03:00
e60d2f86b3
imageon/common: Fix parameter name for spdif_rx
2015-09-29 18:50:41 +03:00
b4252a8512
imageon_loopback: Delete directory
...
This project will not be supported from the next releases.
2015-09-29 14:53:44 +03:00
9832cea071
ad9739a_fmc: Common, reduced DMA fifo size
2015-09-28 12:19:23 +03:00
5b48340b08
fmcomms6: Updated ZC706 project
2015-09-28 11:32:20 +03:00
AndreiGrozav
Adrian Costina
Rejeesh Kutty
Istvan Csomortani
Lars-Peter Clausen
Nicholas Pillitteri