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6214 Commits (aae79716899a0b3c2cd58b0a3cfc23ab53942050)

Author SHA1 Message Date
Rejeesh Kutty c293c04634 hdl make updates 2016-06-01 13:53:09 -04:00
Rejeesh Kutty 46b464ed72 adrv9371/a10soc- qsys updates 2016-06-01 13:48:51 -04:00
Rejeesh Kutty 3832f2669e axi_jesd_xcvr: support tx/rx disable 2016-06-01 13:48:51 -04:00
Rejeesh Kutty a958ef27da adrv9371- qsys updates 2016-06-01 13:48:51 -04:00
Rejeesh Kutty 54f398cc36 ad9371-hw- add dsp slice 2016-06-01 13:48:51 -04:00
Rejeesh Kutty 5b2a90ffff adrv9371- qsys 2016-06-01 13:48:51 -04:00
Rejeesh Kutty af45acfcb9 ad9371- qsys updates 2016-06-01 13:48:51 -04:00
Rejeesh Kutty d2fc64d130 daq3/a10gx: updates 2016-05-27 08:37:47 -04:00
AndreiGrozav d10dd78094 kcu105: Update common design to 2015.4 2016-05-27 14:59:28 +03:00
Istvan Csomortani 1853c6921d adrv9371x/zc706: Fix typo in system_top 2016-05-27 14:13:55 +03:00
Istvan Csomortani a6fbf6c20b adrv9371x: Update the Makefiles 2016-05-27 14:13:55 +03:00
Istvan Csomortani e1495b89f9 axi_dacfifo: Cosmetic changes 2016-05-27 14:13:55 +03:00
Istvan Csomortani c724c027c4 axi_dacfifo: Fix the synchronizers 2016-05-27 14:13:55 +03:00
Istvan Csomortani 183c67aca0 axi_dacfifo: Update the axi write controller 
Do some refactoring and add a DMA beat counter.
 2016-05-27 14:13:55 +03:00
Istvan Csomortani 8caa783f5c axi_dacfifo: Update the constraints 2016-05-27 14:13:55 +03:00
Istvan Csomortani 32d46389f2 adrv9371x: Move GTs AXI interface to HP3 
If the VDMA and the GTs AXI are connected to the same HP port, the
HDMI won't work on full resolution (1080p). Care should be taken, this can
affect the receive and observation paths (both are connected to HP2).
 2016-05-27 14:13:55 +03:00
Istvan Csomortani b452a8e2d4 adrv9371x: Connect bypass and data underflow 2016-05-27 14:13:55 +03:00
Istvan Csomortani 3859cba186 adrv9371x/zc706: Add PL_DDR FIFO to the design 2016-05-27 14:13:55 +03:00
Istvan Csomortani 3b6a36e3e2 axi_dacfifo: Increase the ASYM_MEM depth in the DAC side 
Increase the asymetric memory depth on the DAC side. Increase the
data width of the grey coder and decoder.
The controller fills up the CDC memory with three AXI burst, to prevent
underflow on the wrap arounds.
 2016-05-27 14:13:55 +03:00
Istvan Csomortani d0b40afb45 zc706/common: Fix PL_DDR3 fifo integration script 2016-05-27 14:13:55 +03:00
Istvan Csomortani c8d4f956e7 axi_dacfifo: Update the read back logic 
Update the readback logic of the FIFO. The controller uses a
relative address counter, which counts the DMA beats. The readback
logic uses the last value of that counter to define the wrapping
address. The aditional data from the last AXI burst, if there is any,
will be dropped.
 2016-05-27 14:13:55 +03:00
Istvan Csomortani 88e0cfec42 axi_dacfifo: The AXI read and write have the same properties 
AXI read and AXI write channel have the same SIZE and LENGTH.
 2016-05-27 14:13:55 +03:00
Istvan Csomortani aca3038919 axi_dacfifo: No overflow for DAC 2016-05-27 14:13:55 +03:00
Istvan Csomortani 81ade7f26c axi_dacfifo: Fix resets 
DMA side: axi_resetn is used to reset the address counters
DAC side: GT tx_rst is used to reset the last_address register
 2016-05-27 14:13:55 +03:00
Istvan Csomortani 578376c8fe axi_dacfifo: Add bypass logic 2016-05-27 14:13:55 +03:00
AndreiGrozav f10c1e6e93 axi_hdmi_tx: Remove hdmi_full_range register 2016-05-27 14:04:40 +03:00
Istvan Csomortani dbebcb7968 README.md: Update the README 
(cherry picked from commit 7b01cd9eca)
 2016-05-26 09:09:42 +03:00
Istvan Csomortani 1b9182cac0 README.md: Update the README 
(cherry picked from commit 7b01cd9eca)

Conflicts:
	README.md
 2016-05-25 18:53:28 +03:00
Rejeesh Kutty 9c6e80fca2 daq3/a10gx- qsys modifications 2016-05-24 03:15:45 -04:00
Rejeesh Kutty 05ac271aff daq3/a10gx- qsys modifications 2016-05-24 03:15:24 -04:00
Rejeesh Kutty 39d23032f1 daq2- qsys updates 2016-05-23 10:55:44 -04:00
Rejeesh Kutty d254fa841b library- altera updates 2016-05-23 10:55:07 -04:00
Rejeesh Kutty 0d1c4d232e a10soc- updates-1 2016-05-20 16:14:57 -04:00
Rejeesh Kutty 3f00614bc7 axi_jesd_xcvr: rx/tx only select 2016-05-20 16:13:36 -04:00
Rejeesh Kutty f1a603a3b1 ad9371- altera ip 2016-05-20 15:16:36 -04:00
Rejeesh Kutty 09520709b0 make updates 2016-05-20 12:35:45 -04:00
Rejeesh Kutty f92e8509bb adrv9371x- added 2016-05-20 11:46:25 -04:00
Rejeesh Kutty b5b05bb9d1 axi_ad9371: added 2016-05-20 11:41:54 -04:00
Rejeesh Kutty 50d018fc11 arradio- rfifo/wfifo added 2016-05-18 13:24:13 -04:00
Rejeesh Kutty bf0b90229a rfifo/wfifo- qsys ip 2016-05-18 13:24:13 -04:00
Rejeesh Kutty 7fdaee186c upack/cpack- qsys ip 2016-05-18 13:24:13 -04:00
Rejeesh Kutty a262eb7ab3 ad9361- output-rst - associated-rst issue? 2016-05-18 13:24:13 -04:00
Rejeesh Kutty e15893444c upack- fix interface names 2016-05-18 13:24:13 -04:00
Rejeesh Kutty 285cbc7225 xfifo- fix sdc/xdc names 2016-05-18 13:24:13 -04:00
Rejeesh Kutty d7f0bd1b76 ad9361- add reset sink 2016-05-18 13:24:13 -04:00
Rejeesh Kutty bb4ed42a93 ad9361- add missing wires 2016-05-18 13:24:13 -04:00
Rejeesh Kutty 136a86adae a10gx/base: set gpio to 32 2016-05-18 15:26:12 +03:00
Rejeesh Kutty 93b338eea4 a10gx/base: separate gpio in/out 2016-05-18 15:26:03 +03:00
Adrian Costina a51dd941a9 a10gx: Updated base design to include MMU 2016-05-18 11:44:43 +03:00
Rejeesh Kutty 33ceb5e673 daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-05-17 22:56:04 +03:00