Commit Graph

103 Commits (aaae350b3defa5664ab1dd38041c3203d5a397e5)

Author SHA1 Message Date
Rejeesh Kutty f3959cb5b9 zcu102- 2016.4 updates 2017-05-18 14:17:20 -04:00
AndreiGrozav 70e3dd00ff scripts: Update required tool versions 2017-05-17 16:45:20 +03:00
Rejeesh Kutty ecfa15bfce version check- change to critical warning 2017-05-12 09:51:48 -04:00
Rejeesh Kutty 2027c8427c adi_boadr- disconnect and remove unused ports 2017-04-27 13:26:17 -04:00
Rejeesh Kutty 68bb7ffa40 adi_board- keep port delete simple 2017-04-25 15:44:03 -04:00
Adrian Costina 8b76c34dea scripts: Created ADI_POWER_OPTIMIZATION parameter for enabling power optimizations in the implementation stage 2017-04-18 12:17:40 +02:00
Rejeesh Kutty 6d2b3bc1c7 adi_project- try something simple first 2017-04-11 14:27:35 -04:00
Rejeesh Kutty 1d9a8a24dc adi_board- create_bd_cell replacement 2017-04-11 14:26:02 -04:00
Rejeesh Kutty 820874ef93 adi_board- add auto ip version handling 2017-04-06 13:02:17 -04:00
Rejeesh Kutty 879ed64bb6 compression flag changes 2017-02-22 15:15:53 -05:00
Adrian Costina e8bcbb74da scripts: fixed tcl syntax for altera projects not meeting timing 2017-02-16 21:21:51 +02:00
Adrian Costina 8453d758c2 scripts: If an altera project doesn't meet timing, rename the sof 2017-02-16 19:20:49 +02:00
Rejeesh Kutty 3e57ff1fc5 z-mpsoc- map 0x4-0x8,0x7-0x9 2016-12-20 16:14:38 -05:00
Rejeesh Kutty 22e230618c scripts/adi_board.tcl- support multiple xcvrs 2016-11-23 16:22:05 -05:00
Rejeesh Kutty 8f562fd069 xcvr updates- board procedure 2016-11-22 14:43:36 -05:00
Rejeesh Kutty 750b23621b board-tcl: xcvr qpll/cpll changes 2016-11-22 12:53:02 -05:00
Rejeesh Kutty f43248c2bc common/pzsdr*- removed 2016-11-18 11:32:43 -05:00
Rejeesh Kutty 33f9ed33c7 projects- ultrascale+ 2016-09-30 11:55:10 -04:00
Rejeesh Kutty 4a5b7fc723 scripts- reconnect added 2016-09-29 11:50:58 -04:00
Rejeesh Kutty 79b9e21be8 board- xcvr procedure 2016-09-26 15:20:18 -04:00
Istvan Csomortani cd0c981b50 projects/scripts: Fix to prevent a warning
In case of axi_interconnects, when just one slave and master interface is
active, the 'Interconnect Optimization Strategy' is disabled. So this
parameter should be set just if there is more than one slave interface.
2016-08-26 10:08:00 +03:00
Istvan Csomortani 6ab137a0e9 projects/scripts: Cosmetics 2016-08-26 10:07:08 +03:00
Adrian Costina f1b834ab25 scripts: Update script so that all interconnects are optimized for performance 2016-08-22 16:56:02 +03:00
Rejeesh Kutty 67bf8f8e78 scripts- fix path and device defaults and override 2016-08-19 15:56:07 -04:00
Adrian Costina 452d4706d3 kcu105: Update base project to 2015.4.2
- change part to revision 1.1 of the board
2016-08-09 10:19:36 +03:00
Shrutika Redkar 6ffe59728b hdl-vivado-2016.2- update 2016-07-28 13:44:57 -04:00
Shrutika Redkar 3b2bde2fa1 hdl-vivado-2016.2- min. addr-space requirement 2016-07-28 13:44:57 -04:00
Lars-Peter Clausen 44d9f98e12 adi_project.pl: Fix ADI_NO_BITSTREAM_COMPRESSION detection logic
Only enable bitstream compression only if both the
ADI_NO_BITSTREAM_COMPRESSION environment and TCL variable are not set.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-07-14 10:44:42 +02:00
Lars-Peter Clausen 62c7114d77 Enable bitstream compression for Xilinx projects
Enabling bitstream compression reduces the size of the generated bitstream.

This means on one hand it will consume less storage, which is especially
useful for the BOOT partition of the ADI images where we store BOOT.BIN
files for all supported platforms.

On the other hand a smaller bitstream is faster to load from the storage
medium and it is also faster to program to the FPGA. So it reduces the
overall boot time as well.

The only downside of bitstream compression is that the bitstream size is no
longer constant, but depends on the actual design and resource utilization.
This will not work with bootloaders that expect a fixed size.

When building a bitstream using the tcl scripts bitstream compression can
be disabled by setting the ADI_NO_BITSTREAM_COMPRESSION environment
variable.

Initial tests show a reduction of a round 50% in size for most ADI
projects.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-07-14 10:16:15 +02:00
Rejeesh Kutty 16e3a0e569 zcu102- updates 2016-05-10 15:40:41 -04:00
AndreiGrozav 679d471d75 Merge branch 'hdl_2016_r1' into dev
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
2016-04-19 18:05:50 +03:00
Rejeesh Kutty bf6ef4e5f3 board- add disconnect 2016-04-11 15:33:00 -04:00
AndreiGrozav 71be9519ec adi_project.tcl: Updated to 2015.4 2016-03-15 15:03:50 +02:00
Rejeesh Kutty b147e9c94a pzsdr1- updates 2016-02-02 12:33:01 -05:00
Rejeesh Kutty bcac3eef4d pzsdr1- initial commit 2016-01-25 16:07:33 -05:00
Lars-Peter Clausen 51d20b1a61 adi_project.tcl: Add MicroZed support
Handle the projects for the MicroZed and set up the FPGA part accordingly.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Istvan Csomortani ef9bdf6ec9 adi_project: Regenerate the layout of the IP Integrator subsystem design. 2015-11-09 11:01:10 +02:00
Adrian Costina afc4274ee3 common scripts: Changed the resulting hdf file to system_top_bad_timing, if design doesn't meet timing. 2015-11-06 16:01:19 +02:00
Adrian Costina 0c7c0f2cd8 common scripts: Change the name of the generated HDF if the design doesn't meet timing 2015-11-05 18:41:51 +02:00
Istvan Csomortani c83239b014 fmcomms2/zc706pr: Update PR design
+ Add system_top.v to design
+ Add pr specific constraints
2015-10-09 13:23:42 +03:00
Rejeesh Kutty 48af5f29de rfsom renamed to pzsdr 2015-09-18 11:19:50 -04:00
Istvan Csomortani 971e3395e7 projects/scripts: Update board part names.
Property 'board' is deprecated for object type 'project', 'board_part' is used. Update the 'board_part' property names for all Xilinx development boards.
2015-08-25 10:19:57 +03:00
Istvan Csomortani 0dfb3e2019 tcl_scripts: Update Vivado version number to 2015.2.1 2015-08-20 10:50:52 +03:00
Lars-Peter Clausen 6862655b0d Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty db76fe3298 tquest- generate the timing report file 2015-06-19 14:32:53 -04:00
Rejeesh Kutty 886c24f597 tq-alt: added 2015-06-04 10:53:14 -04:00
Lars-Peter Clausen c53f8c15ee Add CN0363 project
Add support for the CN0363 (colorimeter) board connected to the ZED board.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 17:21:35 +02:00
Rejeesh Kutty e489090fbb scripts- initialize prcfg list 2015-05-04 12:34:19 -04:00
Istvan Csomortani e7a0da9089 fmcomms2 : Verify the existence of the PR license
The fmcomms2 runs by default on PR mode, if the project script does not find a PR license, will implement just the default mode.
2015-05-04 15:12:38 +03:00
Rejeesh Kutty 4bb26caa13 itx045: default install 2015-05-01 16:19:10 -04:00