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346 Commits (a84397d34537459f8713b8e85334a335c6b48029)

Author SHA1 Message Date
acozma a84397d345 motor_control: Changed the encoder pins mapping. 2014-10-31 17:37:28 +02:00
acozma 356e1c7ac1 motor_control: Changed the encoder pins mapping. 2014-10-31 17:08:18 +02:00
Adrian Costina 3c78d8fe58 ad9265_fmc: Added correct fifo to ILA. Updated interrupts 2014-10-31 14:49:29 +02:00
Adrian Costina 6fac294b6f fmcomms2: Updated zc706 project to new interrupt system 2014-10-31 14:15:29 +02:00
Istvan Csomortani 91ea11041d prcfg_mitx045: Upgrade of the project script. 
- the design using the common PN monitor
 - the first implemented logic will be the qpsk, to get a better result
 - cosmetic changes
 2014-10-31 12:18:00 +02:00
Istvan Csomortani e450e78f13 prcfg: Update design to Vivado 2014.2 2014-10-31 12:05:19 +02:00
Istvan Csomortani 860a7caa56 prcfg: dac and adc to dma interface width is 64 2014-10-31 12:04:34 +02:00
Istvan Csomortani ea194755e1 prcfg: Upgrade the QPSK logic 
Regenerate the qpsk logic, with the new HDL coder, and modify the design to support the new files.
 2014-10-31 11:59:29 +02:00
Istvan Csomortani 16cdae3001 mitx045_base: Delete unnecessary timing constraints. 2014-10-31 11:50:49 +02:00
Istvan Csomortani 07673b673a adv7511_mitx045: Interrupt update 2014-10-31 11:46:27 +02:00
Istvan Csomortani 67bec719f7 mitx045_base: Interrupt update 2014-10-31 11:45:33 +02:00
Paul Cercueil b9f800ff65 fmcadc3: zc706: Fix connection to the system clock 
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
 2014-10-31 11:06:16 +01:00
Rejeesh Kutty 21f99b1c97 daq2: remove ila for kcu105 2014-10-30 15:26:29 -04:00
Rejeesh Kutty 56859ad4c9 sys_dmafifo: use internal memory 2014-10-30 15:26:28 -04:00
Istvan Csomortani 5bd00df33a adv7511_zc706: Interrupt update 2014-10-30 19:02:16 +02:00
Istvan Csomortani d81484a6f3 adv7511_zed: Interrupt update 2014-10-30 19:01:17 +02:00
Istvan Csomortani 7ae003cf82 zed_base: Interrupt update 2014-10-30 19:00:05 +02:00
Istvan Csomortani e0b7ef2f4f scripts: Update scripts for PR design flow 
+ Rewrite the pr_verify process, to improve verification time
 + Update the implementation flow: always the biggest logic will be implemented first, to achieve a better result
    therefore force the tool to optimize the first logic with 'ExploreSequentialArea'
 + Make utilization report just from the PR pblock, that's more relevant as the utilization report of the whole fabric
 2014-10-30 18:51:13 +02:00
Istvan Csomortani 02b32abefe adv7511_zc702: Interrupt update 2014-10-30 18:42:14 +02:00
Istvan Csomortani ba53e156e3 ZC702_base: Interrupt update 2014-10-30 18:39:49 +02:00
Rejeesh Kutty f595b86576 kcu105: lutram constraints for ies 2014-10-30 11:20:27 -04:00
Rejeesh Kutty d0a70380bf kcu105: lutram constraints for ies 2014-10-30 11:19:55 -04:00
Rejeesh Kutty 4c0e4d280f dmafifo: internal version- light duty 2014-10-30 11:12:13 -04:00
Rejeesh Kutty 360e7104b6 dmafifo: axi version- heavy duty 2014-10-30 11:12:12 -04:00
Michael Hennerich cfa1a93441 Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev 2014-10-30 08:42:09 +01:00
Adrian Costina 56374cf592 usdrx1: Added synchronization, updated constraints, added timing check for a5gt project 2014-10-29 19:29:42 +02:00
Lars-Peter Clausen cc265b6b9c daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal 
For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-29 18:15:54 +01:00
Adrian Costina 8c789104a6 ad9671: Fixed constraints. Modified system_timing.tcl so that it will fail if timing are not met 2014-10-29 18:25:56 +02:00
Rejeesh Kutty 2e01ad2eec ad9625_fmc/zc706: ps7 interrupt updates 2014-10-29 12:13:44 -04:00
Michael Hennerich b7946febfa Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev 2014-10-29 08:50:51 +01:00
Rejeesh Kutty f83622a2e6 daq2/kcu105: interrupt updates 2014-10-28 15:51:42 -04:00
Rejeesh Kutty 4788d09620 vc707: interrupt updates 2014-10-28 15:42:55 -04:00
Rejeesh Kutty c9691fac64 ad9625_fmc: merge zc706 and vc707 2014-10-28 10:12:19 -04:00
Rejeesh Kutty 627da6161b ad9625_fmc: remove dma clock for now - zynq/non-zynq merge 2014-10-28 10:12:18 -04:00
acozma 36c7034bd6 ad7175: Fix dma issues 2014-10-28 16:00:06 +02:00
acozma 9e1d1c1b49 ad7175: Updated the AD7175 IP and project 2014-10-28 14:28:38 +02:00
Rejeesh Kutty fd66affa42 scripts: add default memory interconnect 2014-10-27 15:53:20 -04:00
Rejeesh Kutty fc4e002150 scripts: add mb cpu side 2014-10-27 15:53:19 -04:00
Istvan Csomortani 4f15f5c34c adv7511: Update interrupts. 
The ad_interrupts.v was used to concatenate the interrupts.
 2014-10-27 19:48:05 +02:00
Istvan Csomortani a870603db5 common_bd: Update the common block designs to the new IRQ path 
Avoid the use of xil_concat module by using the ad_interrupts.
 2014-10-27 19:44:25 +02:00
Adrian Costina d04a545a41 fmcomms2: updated zc706 project with new constraint style 2014-10-27 19:27:36 +02:00
Rejeesh Kutty 61c769e035 kc705: daq2 updates 2014-10-27 09:59:57 -04:00
Rejeesh Kutty d1e3993bd0 kcu105: daq2 updates 2014-10-27 09:59:56 -04:00
Rejeesh Kutty d471b61f3e fifo: merge zynq and non-zynq 2014-10-27 09:59:54 -04:00
Rejeesh Kutty 8b4d70eac6 daq2: merge zc706 and kcu105 2014-10-27 09:59:53 -04:00
Rejeesh Kutty 54f341fad8 scripts: sdk export before timing check 2014-10-27 09:59:52 -04:00
Rejeesh Kutty 4494998940 scripts: ignore another variant of reset warning 2014-10-27 09:59:51 -04:00
Istvan Csomortani 10b898a62d zed_base: Fix IRQ layout. 
Just a temporally fix of IRQ layout.
 2014-10-27 14:46:26 +02:00
Istvan Csomortani 3645139e59 fmcomms6: Avoiding redefinition of system clocks. 2014-10-23 12:55:56 +03:00
Istvan Csomortani dd5d57843d fmcomms6: Update version of the ILA core 2014-10-23 12:30:55 +03:00