Commit Graph

2957 Commits (9e0c39a71bc804b3de6b38d3a25fe9e01dc02673)

Author SHA1 Message Date
Rejeesh Kutty ed62101308 common/altera: primitives 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 779d014750 ad9361-common alt/xil interface 2016-04-29 10:17:35 -04:00
Istvan Csomortani 160d54f311 ad7616_sdz: Some comment rephrase 2016-04-29 16:41:35 +03:00
Istvan Csomortani 7ec4c00f9f axi_ad7616: DMA is always ready 2016-04-29 16:36:33 +03:00
Istvan Csomortani 427f85959c axi_ad7616: Fix the AXI stream interface 2016-04-29 16:34:34 +03:00
Istvan Csomortani 33199263e1 axi_ad7616: Delete burst_length register
This was an unnecessary feature of the hdl core.
2016-04-29 16:28:48 +03:00
Rejeesh Kutty 664ea16a0f ccpci- carrier changes 2016-04-27 16:26:11 -04:00
Rejeesh Kutty e790e4c3ae a10soc- complete qsys 2016-04-25 12:56:19 -04:00
Rejeesh Kutty bfa6fe2a40 a10soc- updates 2016-04-25 11:23:16 -04:00
Rejeesh Kutty 28159aeec9 a10soc- updates 2016-04-25 11:11:46 -04:00
Rejeesh Kutty 0a3967b886 a10soc- updates 2016-04-25 10:53:26 -04:00
Rejeesh Kutty d36d1263c5 a10soc- updates 2016-04-25 10:50:09 -04:00
Istvan Csomortani d5d7c12f0e axi_ad7616: Fix the register map 2016-04-25 11:36:39 +03:00
Istvan Csomortani 2ccdd426ec axi_ad7616: Fix the rd_db_valid generation and do some cosmetic changes. 2016-04-25 11:28:22 +03:00
Istvan Csomortani 1fd5c0f28b ad7616_sdz: Fix IO definitions for the parallel interface. 2016-04-25 10:56:45 +03:00
Istvan Csomortani 6de356e8fc ad7616_sdz: Fix the data width at i_iobuf_adc_cntrl 2016-04-25 10:55:37 +03:00
Istvan Csomortani ad227c1af0 up_axi: Wait more to a valid read acknowledge. 2016-04-25 10:34:17 +03:00
Rejeesh Kutty 2a5f31d26b fmcomms2/a10soc- copy 2016-04-22 15:15:44 -04:00
Rejeesh Kutty 82c4f75f13 a10soc- a10gx copy 2016-04-22 10:39:21 -04:00
Rejeesh Kutty 7a4a7edfba daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:07:41 -04:00
Rejeesh Kutty e00236e5fd daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:04:46 -04:00
Rejeesh Kutty 8b2542b181 daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:01:12 -04:00
Rejeesh Kutty e9b199959a library/adcfifo- constraints update 2016-04-20 15:57:25 -04:00
AndreiGrozav 679d471d75 Merge branch 'hdl_2016_r1' into dev
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
2016-04-19 18:05:50 +03:00
Adrian Costina 402253d308 usb_fx3: Updated design to include the GPIF II interface 2016-04-19 15:52:30 +03:00
Adrian Costina d7d8b2cf1c axi_usb_fx3: Integrated actual GPIF II interface, with 2 address lines 2016-04-19 14:38:26 +03:00
Istvan Csomortani 8a574cd8ba zc706_system_plddr3.tcl : Add integration process for the AXI_DAC_FIFO 2016-04-19 11:30:52 +03:00
Istvan Csomortani e855ef38f4 axi_dacfifo: Initial commit
AXI DAC fifo, which use the PL side DDR memory. The minimum data granularity is 1kbyte.
2016-04-19 11:28:33 +03:00
Istvan Csomortani 42cd05ab19 ad_mem_asym: Add support for more ratios.
Supported ratios: 1:1/1:2/1:4/1:8/2:1/4:1/8:1
2016-04-19 11:18:30 +03:00
AndreiGrozav c291f8f107 daq1: Updated design to 2015.4 2016-04-14 23:36:47 +03:00
AndreiGrozav 469b4ea5e8 fmcadc5: Updated design to 2015.4 2016-04-14 23:18:23 +03:00
AndreiGrozav 62bd057106 fmcadc5/common: Update common design to 2015.4 2016-04-14 23:01:38 +03:00
AndreiGrozav 6fe41ebb08 axi_hdmi_tx: Upgrade hdmi clipping process
-added two registers that control the clipping ranges (0x01a and 0x01b)
-extend clipping process for all output data formats
2016-04-12 22:01:07 +03:00
Istvan Csomortani 69d721526a util_dacfifo: Add constraints file 2016-04-12 13:21:50 +03:00
Rejeesh Kutty a88ced8136 pzsdr1: lvds/cmos updates 2016-04-11 16:18:29 -04:00
Rejeesh Kutty 3006c5a223 make updates 2016-04-11 16:14:59 -04:00
Rejeesh Kutty 736bbdd95a pzsdr1- io updates 2016-04-11 16:12:21 -04:00
Rejeesh Kutty 8a5a5082f3 pzsdr1- io updates 2016-04-11 16:12:09 -04:00
Rejeesh Kutty 8e689f4594 pzsdr1- lvds/cmos constraints 2016-04-11 16:00:18 -04:00
Rejeesh Kutty 7e807d83b1 pzsdr1- cmos mode 2016-04-11 15:58:29 -04:00
Rejeesh Kutty bf6ef4e5f3 board- add disconnect 2016-04-11 15:33:00 -04:00
Rejeesh Kutty 68bc647472 pzsdr1- ddr board delays update 2016-04-06 15:30:27 -04:00
Istvan Csomortani 7b01cd9eca README.md: Update the README 2016-03-31 19:42:52 +03:00
AndreiGrozav 21208ca208 Makefiles: Update Makefiles 2016-03-31 12:37:47 +03:00
Istvan Csomortani 1fab6ce477 daq2/common: Add util_dacfifo/dac_xfer_out control 2016-03-29 16:55:33 +03:00
Istvan Csomortani 255b0ebd40 util_dacfifo: Add dac_xfer_out control
The dac_xfer_out control signal is asserted while the DAC reads back data. Should be connected to upack/dma_xfer_in.
2016-03-29 16:50:00 +03:00
Adrian Costina 657144d9a7 a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
2016-03-28 13:21:36 +03:00
Istvan Csomortani 7ce3f6e274 ad7616_sdz: Fix system top for parallel interface mode. 2016-03-24 13:49:30 +02:00
Istvan Csomortani a1c2c61884 ad7616_sdz: Update the IOBUF instance names 2016-03-24 11:46:33 +02:00
AndreiGrozav 7c2f34549b motcon2_fmc: Update common design to 2015.4 2016-03-23 10:27:07 +02:00