c72cf99562
daq2- gt changes
2015-08-17 14:11:58 -04:00
b4eac232db
a10gx- move cores inside qsys
2015-07-21 11:06:45 -04:00
fcc298d837
a10gx- move cores inside qsys
2015-07-21 11:06:17 -04:00
b3102b5095
daq2/a10gx-- xcvr+base changes
2015-07-21 11:01:45 -04:00
445c4c835d
daq2-bd: xcvr components
2015-07-21 10:54:23 -04:00
97b8468819
daq2- constraints
2015-07-20 09:32:17 -04:00
1d6a77049d
daq2- base/board split
2015-07-20 09:31:57 -04:00
4b8d764852
daq2- base system modifications
2015-07-20 09:31:44 -04:00
da2e7acacb
daq2- separate base/board systems
2015-07-20 09:31:15 -04:00
2f53dc4412
daq2- board system only
2015-07-20 09:30:32 -04:00
80dc3bf92f
daq2/a10gx: remove signal tap
2015-07-16 14:59:01 -04:00
a7da779b94
Makefile: Updated Makefiles
2015-07-16 18:19:42 +03:00
7c142178dd
daq2/a10gx- axi_jesd_xcvr sysref name changes
2015-07-15 15:59:52 -04:00
ffd767deb2
daq2/a10gx- axi_jesd_xcvr sysref name changes
2015-07-15 15:59:51 -04:00
1f7745610e
daq2- ddr updates
2015-07-14 12:46:52 -04:00
a2e7fb9491
daq2/a10gx: qsys signal tap version
2015-07-13 10:07:18 -04:00
825fddd034
transceiver split up outside qsys
2015-07-10 11:45:07 -04:00
8c0d74aa90
transceiver split up outside qsys
2015-07-10 11:44:42 -04:00
e40aac9ab6
transceiver split up outside qsys
2015-07-10 11:44:22 -04:00
f1dd2435b4
signal tap removed
2015-07-08 15:47:31 -04:00
c9e73b023d
signal tap removed
2015-07-08 15:46:52 -04:00
075b1e5424
daq2/a10gx: added axi_jesd_xcvr control
2015-07-07 10:22:36 -04:00
46fa91d5be
Makefile: Update Make files
2015-07-03 18:08:57 +03:00
6bc24e25eb
stap- need to be qsys
2015-06-29 13:26:32 -04:00
d25e02d7ee
stap- need to be qsys
2015-06-29 13:26:20 -04:00
6862655b0d
Add .gitattributes file
...
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
714d415804
daq2/a10gx- signaltap changes
2015-06-19 14:33:04 -04:00
51e6a74a3d
daq2/a10gx- add xmit swap
2015-06-19 14:32:59 -04:00
d6b1260678
daq2/a10gx- signal tap + gpio
2015-06-19 14:32:58 -04:00
67df6b3ea8
a10gx- disable lab cell on dsp input register
2015-06-19 14:32:54 -04:00
4c80013faf
projects/daq2: gt lane split
2015-06-12 15:56:03 -04:00
e6525136a9
daq2/common: axi_ad9144_fifo needs a proper reset sequence
...
Connect the axi_ad9144_fifo/dma_rst signal to sys_cpu_reset
2015-06-12 14:03:46 +03:00
f587aa42d9
a10gx- tx sync
2015-06-10 14:32:25 -04:00
e3e4af5c51
daq2/zc706: open ports
2015-06-10 14:25:58 -04:00
00b8c171b8
a10gx: pll locked to reset controller
2015-06-08 15:00:11 -04:00
f81d22a17a
altera- common timing check
2015-06-04 10:56:32 -04:00
d111692608
daq2/a10gx- ddr-ref @133
2015-06-04 10:53:16 -04:00
f9ffaf457d
projects/daq2- drp moved to up clock
2015-06-01 13:39:26 -04:00
4a701d3895
a10gx- no-ddr
2015-06-01 11:00:02 -04:00
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
ad3198f623
a10gx: top level fixes
2015-05-21 14:06:15 -04:00
6b9906b22b
Refresh Makefiles
...
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
19b094cab5
daq2/a10gx- added jesd align
2015-05-20 15:39:27 -04:00
f1c30ac225
daq2/a10gx- qsys updates
2015-05-20 14:24:49 -04:00
52b6077a46
a10gx- 15.0 updates
2015-05-19 15:12:23 -04:00
c19749361d
Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
...
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
672a5a4dfa
a10gx- updates
2015-05-14 14:35:43 -04:00
848dac70d5
a10gx: updates--
2015-05-11 11:56:27 -04:00
dc0eea5f0f
a10gx: updates--
2015-05-11 11:56:26 -04:00
bdc3f3d807
a10gx: updates--
2015-05-11 11:56:24 -04:00
75e055dab9
daq2/a10gx- initial commit
2015-05-11 11:56:23 -04:00
15618c9edf
daq2 : Integrate the DACFIFO into the supported projects.
...
+ All pack/unpack logic is made by the cpack and upack modules.
+ The DAC FIFO is integrated between the TX DMA and cpack.
+ All the top files are updated, all the projects compiled successfully.
2015-05-11 12:20:50 +03:00
00335a2af2
Makefile: Fix ZC706 Makefiles with propper address for the mig file
2015-05-11 10:25:07 +03:00
91279253ef
Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile
2015-05-08 15:31:40 +03:00
949abcdc8f
Makefile: Updated makefiles so that the project recipe does not depend on lib
2015-05-06 14:58:29 +03:00
e332fa01c8
ad6676evb, daq2, fmcadc2, fmcjesdadc1, usdrx1: Updated jesd reset connection
2015-04-30 12:11:46 +03:00
a61a195e3f
Makefiles: Updated makefiles to add the new constraints as dependecies
2015-04-23 11:16:39 +03:00
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
...
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
6d0a2bf64c
axi_adcfifo: added
2015-04-07 16:21:39 -04:00
4f7f109056
util_adcfifo: added
2015-04-07 16:08:38 -04:00
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
b6d5e21133
makefile: added
2015-04-01 16:29:02 -04:00
0dc0d825a6
makefile: added
2015-04-01 16:29:01 -04:00
283427647b
makefile: added
2015-04-01 16:29:00 -04:00
61293e7231
makefile: added
2015-04-01 16:28:58 -04:00
73b31cfea0
makefile: added
2015-04-01 16:28:57 -04:00
cf85f0b0bb
daq2/vc707: gpio_bd is 21bits
2015-03-26 14:18:26 -04:00
90a8d91c36
daq2/vc707: 2014.4 updates
2015-03-26 14:02:43 -04:00
17918bf735
daq2/vc707: 2014.4 updates
2015-03-26 14:02:39 -04:00
6b1eac4211
daq2/vc707: 2014.4 updates
2015-03-26 14:02:34 -04:00
6a85724793
daq2/vc707: 2014.4 updates
2015-03-26 14:02:31 -04:00
5014b4209c
kc705/vc707: consistency fixes
2015-03-26 14:02:10 -04:00
276bb9525a
daq2/kc705: 2014.4 updates
2015-03-26 10:14:12 -04:00
a7e3d2af67
daq2/kc705: 2014.4 updates
2015-03-26 10:14:12 -04:00
803ef90fea
daq2/kc705: 2014.4 updates
2015-03-26 10:14:12 -04:00
3a2d1004b5
daq2: move intrs into ipi
2015-03-12 16:17:09 -04:00
b1b46ed820
daq2: move intrs into ipi
2015-03-12 16:17:04 -04:00
ff3dcbc2cb
daq2: move intrs into ipi
2015-03-12 16:16:55 -04:00
543bfe9d44
daq2/kcu105: removed hdmi/spdif
2015-03-10 16:15:16 -04:00
59457cb3d4
daq2/zc706: base system updates
2015-03-09 16:10:56 -04:00
ce5ece5494
daq2/zc706: base system updates
2015-03-09 16:09:54 -04:00
104782af87
daq2/kcu105: base system updates
2015-03-09 16:09:07 -04:00
548ae9d39e
daq2: move gpio/spi to base design
2015-03-09 16:08:25 -04:00
d5eaadd872
daq2: remove ila for kcu105 ddr-300M timing
2015-03-06 12:38:08 -05:00
7fba7cc6e5
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
af465cbc80
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
1220b53c8c
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
75c4228987
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
605d23d3a4
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
847c2e049a
kcu105: removed lutram constraints
2015-02-26 16:09:55 -05:00
e111e1336e
conflicts-
2015-02-06 22:14:21 -05:00
e1d8dd10a9
daq2: Initial check in of the VC707 based project
...
NOTE: Can not communicate with the clock chip, rx/tx PLL not locking.
2015-01-28 16:24:06 +02:00
03988f1c9f
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:20 -05:00
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
9e64df917c
daq2: 2014.4
2015-01-09 14:12:53 -05:00
39cc7b8b2e
daq2_zc706: Add constraint file for the PLDDR
2014-12-18 10:00:35 +02:00
90fe993db2
daq2: missing sys_rst decl.
2014-12-15 14:39:40 -05:00
0a6769fda9
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:16 -05:00
f99bd3609b
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:04 -05:00
d82952b22a
daq2/kcu105: lane assignment fixes
2014-12-11 11:19:38 -05:00
8dad54b6e3
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 13:53:18 +02:00
4b6968c2af
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 13:51:46 +02:00
14193cf4bd
daq2_kc705: Instantiate dmafifo module
2014-11-26 13:50:42 +02:00
f28845cc0d
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 13:48:48 +02:00
db004641d3
kcu105: dmafifo address width change
2014-11-20 09:28:03 -05:00
3915f7d5f4
daq2: kcu105 dma-fifo changes
2014-11-12 15:25:13 -05:00
d79e95b774
daq2: dma-fifo changes
2014-11-12 15:24:54 -05:00
855919ee8e
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:50 -05:00
dbf5acde76
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:49 -05:00
50ce2e30be
daq2: ila changes for kcu105 timing
2014-11-10 10:57:35 -05:00
21f99b1c97
daq2: remove ila for kcu105
2014-10-30 15:26:29 -04:00
d0a70380bf
kcu105: lutram constraints for ies
2014-10-30 11:19:55 -04:00
cfa1a93441
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-30 08:42:09 +01:00
cc265b6b9c
daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal
...
For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-29 18:15:54 +01:00
b7946febfa
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-29 08:50:51 +01:00
f83622a2e6
daq2/kcu105: interrupt updates
2014-10-28 15:51:42 -04:00
61c769e035
kc705: daq2 updates
2014-10-27 09:59:57 -04:00
d1e3993bd0
kcu105: daq2 updates
2014-10-27 09:59:56 -04:00
8b4d70eac6
daq2: merge zc706 and kcu105
2014-10-27 09:59:53 -04:00
20d59ce39b
daq2: dma fifo modifications
2014-10-22 16:39:28 -04:00
4eeb50114f
daq2: rebase conflicts
2014-10-22 16:39:17 -04:00
43cdafe1e2
kcu105: iic-rstn removed
2014-10-22 16:33:52 -04:00
43fe20d141
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-22 17:19:37 +02:00
17675863e0
all_projects: Fix the interrupt connections to preserve IRQ layout
2014-10-22 11:48:08 +03:00
2beaeb9176
projects/daq2/kcu105/system_constr.xdc: temp constrains
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-21 15:03:55 +02:00
380eeec013
daq2/kcu105: ethernet fix
2014-10-17 13:48:35 -04:00
bca8ec0160
daq2: 2014.2 and ver.d
2014-10-06 14:56:01 -04:00
fb5d212370
daq2/kcu105: fixed timing violations
2014-09-19 15:55:42 -04:00
b58e425b44
daq2/kcu105: timing improvement -register slices hang
2014-09-08 10:24:56 -04:00
f3f8414d81
kcu105: changes for ad_iobuf
2014-08-15 15:01:52 -04:00
b481df0b5f
library: local constraints async groups
2014-08-14 15:09:51 -04:00
663588eeaf
daq2/kcu105: working ddr version
2014-07-29 09:15:30 -04:00
db2386a351
daq2/kcu105: latest mig updates
2014-07-23 16:25:55 -04:00
65879d621f
daq2: updates for the new hardware
2014-07-21 09:06:53 -04:00
2955b9db78
fifo2s: flush if no request, c5soc: 14.0
2014-07-15 16:25:33 -04:00
e7d5d79e42
daq2/kcu105: gth up and running - as it is commit
2014-07-10 10:56:37 -04:00
c75e6b3043
kcu105 pwr-good removed
2014-07-07 09:56:13 -04:00
f2bf5ced04
ad9625: register map updates
2014-07-03 14:30:03 -04:00
f94cbbb0aa
daq2: register map updates
2014-07-03 12:36:37 -04:00
7efd6149f8
daq2: initial checkin
2014-06-12 15:54:25 -04:00
Rejeesh Kutty
Adrian Costina
Istvan Csomortani
Lars-Peter Clausen
Michael Hennerich