Commit Graph

10 Commits (93f46ef6e34b3afb220aa32b9ce174ddcfab92e7)

Author SHA1 Message Date
Laszlo Nagy dd4c8d6807 adrv9001/zcu102: Add debug header 2021-01-26 15:22:41 +02:00
Laszlo Nagy 728904af09 adrv9001/zcu102: Run postRoutePhysOpt to close Rx1 to Rx2 path timing 2021-01-26 15:22:41 +02:00
Laszlo Nagy 3918d43cd1 adrv9001/zcu102: Add TDD sync to PMOD0 J55.1 2021-01-20 13:00:01 +02:00
Laszlo Nagy 0c2745361b adrv9001/zcu102: Add TDD support 2021-01-20 13:00:01 +02:00
Sergiu Arpadi 6f2f2b8626 makefile: Regenerate make files 2021-01-20 01:02:56 +02:00
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
2021-01-20 01:02:56 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific
Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
Laszlo Nagy 24090fafd8 adrv9001/zcu102: Loopback VADJ error to the FMC board 2020-08-31 14:14:03 +03:00
Laszlo Nagy 72f916fcf5 adrv9001/zcu102: Update interface signal names based on direction
Let the names of signals from source synchronous interface match the
direction of the signals.
2020-08-28 13:23:00 +03:00
Laszlo Nagy b27f3ac18f adrv9001:zcu102: Initial version
Generic project that supports CMOS or LVDS interface for the ADRV9001 transceiver.
2020-08-24 17:49:12 +03:00