f34b561e19
daq3: Parameterize JESD204 configuration values
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Added the capability to set the JESD204 configuration values from a single
point in the code and to modify these default settings from the command
line for the Xilinx FPGAs in the project.
Signed-off-by: Dan Hotoleanu <dan.hotoleanu@analog.com>
2022-01-31 10:47:01 +02:00
9093a8c428
library: Move ad_iobuf to the common library, as it's not Xilinx specific
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Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
a589753d92
project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl
2019-06-29 06:53:51 +03:00
43725429ac
adi_project: Rename the process adi_project_xilinx to adi_project
2019-06-29 06:53:51 +03:00
dd8d6f90ee
zcu102:all_projects: Delete required version tcl variable
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All the ZCU102 projects will use the default tool version.
This setup was a temporary exception for hdl_2017_r1 release.
2018-04-11 15:09:54 +03:00
a23c640180
Require Vivado 2017.2.1 for all zcu102 projects
2017-11-20 15:36:51 +00:00
febdbe8dcb
daq3/zcu102: Initial commit
2017-07-31 14:26:23 +03:00
Dan Hotoleanu
Adrian Costina
Istvan Csomortani
AndreiGrozav