Commit Graph

3 Commits (929f80cd310f206c8102619958ed6acde0879e15)

Author SHA1 Message Date
Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline
Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
Laszlo Nagy 20b89ddd99 ad9081_fmca_ebz/vcu128: Make second sync CMOS and GPIO controllable 2022-05-26 09:13:05 +03:00
Laszlo Nagy e76f287e73 ad9081_fmca_ebz:vcu128: Initial version
* 4Txs / 4Rxs per MxFE
 * Tx I/Q Rate: 250 MSPS
 * Rx I/Q Rate: 250 MSPS
 * DAC JESD204B: Mode 9, L=4, M=8, N=N'=16
 * ADC JESD204B: Mode 10, L=4, M=8, N=N'=16
 * DAC-Side JESD204B Lane Rate: 10Gbps
 * ADC-Side JESD204B Lane Rate: 10Gbps
2021-11-19 18:08:16 +02:00