zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
5,432 Commits
1 Branch
0 Tags
23 MiB
Commit Graph

2 Commits (8f2a223af9ec8aec8afb097c7a6ca28dce7839cf)

Author SHA1 Message Date
Istvan Csomortani 03bec4b49c ad_fmclidar1_ebz: Interchange SYSREF and DEV_CLK ports location 
In ZCU102 LA01_CC_P|N are connected to regional clock, but in order to
receive a device clock properly we have to use pin which is connected
to a  global clock buffer. Luckily SYSREF is connected to global clock
pin; swap to port to receive the device clock correctly.

Also, swap the ports in both ZC706 and A10SOC carriers.
 2019-10-17 09:59:23 +03:00
Istvan Csomortani b3e1cd2a15 ad_fmclidar1_ebz: Add support for ZCU102 2019-10-17 09:59:23 +03:00