Commit Graph

381 Commits (8964fd33e33b1d15c1418d8eba15e93d76df1cfd)

Author SHA1 Message Date
Rejeesh Kutty 8964fd33e3 daq1: Clean up dma interface 2014-10-10 12:05:26 +03:00
Paul Cercueil 9798704cc4 DAQ1: Add missing clock line for the AD9250 ADC
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-10-10 09:59:21 +02:00
Paul Cercueil 94e9396557 AD9467: Fixup swapped net names
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-10-08 10:45:32 +02:00
Michael Hennerich af618073a6 projects/common/xxx/xxx_system_bd.tcl: 'Update microblaze defaults
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-07 09:18:47 +02:00
Lars-Peter Clausen 0539bc36c8 axi_ad9467: Fix PN sequence checker
Make sure that the reference PN sequence is only incremented every two clock
cycles to make sure that it matches the rate of the ADC PN sequence.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-06 16:19:01 +02:00
Lars-Peter Clausen b029d07adf common: Connect audio clkgen reset
While we are at it also hide the unused locked pin.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-06 16:17:33 +02:00
Lars-Peter Clausen 54053e0d87 common: Set cpu interconnect strategy to minimize area
There will rarely be concurrent access to the peripheral control bus
interconnect, so there is no need to optimize for performace. Setting the
interconnect strategy to minimize area can reduce the resource usage by
~90%.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-06 16:17:33 +02:00
Lars-Peter Clausen 1defad36b8 fmcomms1: Connect DMA controller directly to the HP ports
The AXI DMAC controller nativly supports AXI3, there is no need to insert a interconnect to do protocol conversion.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-06 16:17:33 +02:00
Istvan Csomortani 801f12f373 ad9467: Fix LVDS delay interface. 2014-10-02 11:34:37 +03:00
Lars-Peter Clausen 68c0c72e53 util_dac_unpack: Fix unpack order with 1 channel
Due to the delay between the dac_valid and the fifo_valid signal we need to
have two counters. One counter which counts the number of incoming
dac_valid signals and generates the dma_rd signal and one counter for the
offset which gets set to 0 when fifo_valid is set.

This fixes issues with the unpack order when only one channel is active.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 18:48:04 +02:00
Lars-Peter Clausen 98dd47e783 axi_spdif: Add missing signals to the regmap read sensitifity list
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:51 +02:00
Lars-Peter Clausen f60e112b50 axi_spdif: Don't use non-static expressions in port assignments
Fixes a warning from the tools.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:51 +02:00
Lars-Peter Clausen 8a994db28b axi_spdif: Set unused signals to 0
Fixes warnings about undriven signals from the tools.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:51 +02:00
Lars-Peter Clausen 96339ba96f axi_i2s: Add missing signals to the regmap read process sensitivity list
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:51 +02:00
Lars-Peter Clausen 32dd1d1a4a axi_i2s: Set unused signals to 0
Fixes warnings from the tools about undriven signals.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen e5a9633f84 axi_dmac: Add default driver values for optional input ports
This silences warnings from the tools about undriven ports.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen 9e7eb81b76 axi_dmac: Hide fifo_wr_sync signal if C_SYNC_TRANSFER_START != 1
The fifo_wr_sync signal is only used when C_SYNC_TRANSFER_START = 1, so hide it otherwise.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen 77cbf26241 axi_dmac: Hide fifo_wr bus when source type is not the fifo interface
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen ff2e102182 axi_dmac: Add clock signal spec for m_axis/s_axis bus
This silences warnings from the tools about having no clock assigned to the bus.
Also fix the name of the TVALID signal.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen fd6b3b5427 fmcomms2: Connect DMA directly to the HP ports
The DMA controller is able to send AXI3 compatible requests, no need to add
a interconnect for protocol conversion in between the DMA controller and the
HP port.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen e1451d8b7e fmcomms2: Set dac_unpack channels to 4
There are only 4 DAC channels in the fmcomms2 design, so set the number of
channels of the dac_unpack core to 4. This slightly reduces resource usage
as well as reducing the DMA alignment requirement from 128bit to 64bit.  The
later value is what existing applications expect the alignement requirement
to be.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen 3944af4179 axi_dmac: Drive unused signals to 0
This silences a few warnings from the tools about undriven signals.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:50 +02:00
Lars-Peter Clausen d32db3a993 axi_dmac: Fix dummy AXI a{r,w}len fields width
The dummy a{r,w}len fields should have the same width as the real a{w,r}len
fields in order to not break auto AXI bus version detection.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:49 +02:00
Lars-Peter Clausen f83fd6dae3 util_dac_unpack: Hide unused signals
Hide unused signals based on the number of selected channels. This silences
a few warnings from the tools about unconnected pins.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:49 +02:00
Lars-Peter Clausen 48921bc872 util_adc_pack: Hide unused signals
Hide unused signals based on the number of selected channels. This silences
a few warnings from the tools about unconnected pins.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:49 +02:00
Lars-Peter Clausen 8fa4b0c56d util_dac_unpack: Don't use localparam symbols in input/output signals
When using a localparam for the width of a input/output signal the tools
won't be able to infer the size of the signal. This results in the signal
always being only 1 bit wide which causes the design to not work.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:49 +02:00
Lars-Peter Clausen 50c434044e util_dac_unpack: Drive unused ports to 0
Silences a few warnings about undriven ports from the tools.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:49 +02:00
Lars-Peter Clausen f7ad7e7ab2 common: Disable TTC0 MMIO routing for PS7
We do not use the ttc0 to MMIO routing, but it is enabled by default, so
explicitly disable it.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-30 13:18:49 +02:00
Lars-Peter Clausen 6a08f26905 axi_i2s/axi_spdif: Create clock and reset interface for DMA bus
This avoids some critical warnings from Vivado that the DMA bus does not has any associated clocks.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-29 15:53:32 +02:00
Lars-Peter Clausen 7682400a28 scripts/adi_ip: Add helper function to create bus clock and reset interface
Add a helper function that can be used to register a clock and a reset interface for the clock and reset signals of a bus.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-29 15:53:32 +02:00
Lars-Peter Clausen 40cbabf573 axi_i2s/axi_spdif: Remove manual creation of Streaming AXI bus
It looks like Vivado is now able to infer these buses from the sources.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-29 15:53:32 +02:00
Istvan Csomortani 74e6e3df0f ad9467 ZED: Fix over range signal path, and the dma interface. 2014-09-29 12:56:09 +03:00
Istvan Csomortani 889a6565ea ad9467 ZED: Cosmetic changes on bd script. 2014-09-29 12:51:46 +03:00
Adrian Costina bc93a15229 fmcomms1: Fixed missing sample issue on ZC706. Added modifications for all other platforms 2014-09-25 15:25:26 -04:00
Adrian Costina 09387431dd fmcomms2: Improved constraints for ac701 and zc702. Fixed common design so that ILA works correctly on microblaze based systems 2014-09-22 14:40:11 -04:00
Adrian Costina aa8635ea94 Merge branch 'master' of https://github.com/analogdevicesinc/hdl 2014-09-22 14:39:08 -04:00
Rejeesh Kutty 07f5795255 fmcadc3: initial updates 2014-09-22 11:17:52 -04:00
Rejeesh Kutty 0cb7567110 fmcadc3: daq2 copy 2014-09-22 11:17:51 -04:00
Rejeesh Kutty ca9f7bf1f6 axi_ad9234: axi_ad9680 copy 2014-09-22 11:17:50 -04:00
Adrian Costina cead3aaf86 ultrasound: disconnected ADN4670 chips from SPI lines.
Connected everything to ground so that the the clock selected is 0 and all outputs are enabled
2014-09-22 11:09:53 -04:00
Rejeesh Kutty fb5d212370 daq2/kcu105: fixed timing violations 2014-09-19 15:55:42 -04:00
Istvan Csomortani 751bdd6cfc daq1: Update the constraint file
- tx_ref_clk and rx_sysref need to be differential
  - cosmetic changes
2014-09-19 18:22:57 +03:00
Adrian Costina f43b5d707e fmcomms2: Reduced clock frequency for ILA to meet timing for ZED
Modified ZED constraints to 250 MHz for the clock from AD9361
2014-09-16 16:08:28 -04:00
Adrian Costina d33fb07587 usdrx1: Modified the GPIO assignments so that board specific GPIOs start from GPIO 32.
GPIOs for which the directions is known, have been specifically assigned.

The SPI clock has been changed to a lower frequency.
2014-09-16 15:56:19 -04:00
Adrian Costina d4db53c3b0 usdrx1_spi: Modified module to be compatible with altera 2014-09-16 15:53:11 -04:00
Lars-Peter Clausen de0edc2083 axi_dmac: src_fifo_inf: Clear pipeline when no transfers are active
Clear the pipeline when no transfers are active to make sure that we do not
get residual data on the first sample for the next transfer.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-16 21:02:05 +02:00
Michael Hennerich a3dbd5ac00 projects/common/vc707/vc707_system_bd: AD9625_FMC update to 2014.2
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-09-16 14:59:36 +02:00
Lars-Peter Clausen c927e90ee1 axi_dmac/axi_fifo: Add missing file
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-15 21:04:57 +02:00
Istvan Csomortani a91f4bb6b9 daq1: General updates
- Add additional GT setups
- Use channel PLL instead of quad PLL
- Add additional ILA probes for debug
2014-09-13 00:23:11 +03:00
Lars-Peter Clausen d8651cdd2e fmcomms2: c5soc: Set dac_util_unpack number of channels to 4
We only do have 4 channels in this design. Reducing the number of supported
channels for the dac_util_unpack core to 4 from 8 lowers the DMA alignment
requirement from 128bit to 64bit.  We need this since applications only
expect a DMA alignment requirement of 64bit.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-12 16:15:12 +02:00