Commit Graph

1690 Commits (88f936cc8641bc4e0c24014995328021d46b6a02)

Author SHA1 Message Date
Rejeesh Kutty da0409b5a6 library- qsys components 2015-05-20 11:51:50 -04:00
Rejeesh Kutty 9b425736ac library: altera ip modifications 2015-05-20 10:41:21 -04:00
Istvan Csomortani 0f32b25fcc Update README.md
Add FPGA vendor names
2015-05-20 17:38:08 +03:00
Istvan Csomortani 74eb3cb11d Update README.md
Add section title Documentation and support
2015-05-20 17:17:23 +03:00
Rejeesh Kutty d48d3f4aa3 scripts/ip-alt- added 2015-05-20 09:11:18 -04:00
Rejeesh Kutty 7c126d74db enable/txnrx- tdd changes 2015-05-20 10:46:06 +03:00
Istvan Csomortani 41d45b310f Update README.md
+ Add note about current status. 
+ Add links for tools.
+ Use embedded links
2015-05-20 10:20:53 +03:00
Rejeesh Kutty 52b6077a46 a10gx- 15.0 updates 2015-05-19 15:12:23 -04:00
Rejeesh Kutty e918588a4b library: remove axi-min-size parameter 2015-05-19 13:07:48 -04:00
Rejeesh Kutty 4fb1be0672 ad9680: delay changes 2015-05-19 12:53:56 -04:00
Rejeesh Kutty af7afd7366 ad9671: delay changes 2015-05-19 12:53:56 -04:00
Rejeesh Kutty 09a05fe9d8 ad9652: delay changes 2015-05-19 12:53:56 -04:00
Rejeesh Kutty 13156593f8 ad9643: delay changes 2015-05-19 12:53:56 -04:00
Rejeesh Kutty c8d3c04a05 ad9625: delay changes 2015-05-19 12:53:56 -04:00
Rejeesh Kutty f53204f9f9 ad9467: delay changes 2015-05-19 12:53:56 -04:00
Rejeesh Kutty 0805da3b6b fmcomms2/rfsom- enable dac delay 2015-05-18 16:45:54 -04:00
Rejeesh Kutty fe0ceb2530 delay-cntrl updates 2015-05-18 15:23:10 -04:00
Rejeesh Kutty 304a202d67 delay-cntrl updates 2015-05-18 14:57:05 -04:00
Rejeesh Kutty 2e257db109 delay-cntrl updates 2015-05-18 14:53:24 -04:00
Rejeesh Kutty 3e51d29f75 enable/txnrx- tdd changes 2015-05-18 14:28:20 -04:00
Rejeesh Kutty 0877c252ad delay-cntrl changes 2015-05-18 14:28:20 -04:00
Rejeesh Kutty 2bad47cf4f delay-cntrl: up-clk, direct access + tx 2015-05-18 14:28:20 -04:00
Rejeesh Kutty 6e047f78c6 delay-cntrl: up-clk, direct access + tx 2015-05-18 14:28:20 -04:00
Adrian Costina 2c1719095d util_axis_resize: Changed _ip.tcl format to the standard format 2015-05-18 17:25:07 +03:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Rejeesh Kutty 672a5a4dfa a10gx- updates 2015-05-14 14:35:43 -04:00
Rejeesh Kutty b311b9dac6 a10gx- updates 2015-05-14 14:35:42 -04:00
Istvan Csomortani a07d11c3e9 axi_ad9361_tdd: Define control bits for continuous receive/transmit 2015-05-14 17:21:32 +03:00
Adrian Costina c9c05e21c2 axi_dmac: Updated constraints to cover cases when the hierarchy is rebuilt by synthesis 2015-05-13 16:34:06 +03:00
Istvan Csomortani 7c9bc40c75 axi_ad9361&TDD: Update TDD
+ Delete unnecessary registers
+ Add the module ad_addsub.v to resolve additions and subtractions inside TDD control
+ Redefine the burst logic
+ Redesign the control signal generations
+ Note: This patch fix the TDD related timing violations
2015-05-13 14:03:01 +03:00
Rejeesh Kutty a1d680ee6b ad9680- add hw tcl 2015-05-12 15:06:42 -04:00
Rejeesh Kutty 833a3de6b5 ad9680- add hw tcl 2015-05-12 15:06:39 -04:00
Rejeesh Kutty 48c769d431 ad9144- add hw tcl 2015-05-12 14:40:38 -04:00
Rejeesh Kutty 553f89f59d ad9144- add hw tcl 2015-05-12 14:39:57 -04:00
Rejeesh Kutty 3226ca4374 fmcadc4- ad9680 version 2015-05-11 13:55:02 -04:00
Rejeesh Kutty c28ff2ff9a fmcadc4- ad9680 version 2015-05-11 13:55:02 -04:00
Rejeesh Kutty 16541335e6 fmcadc4- ad9680 version 2015-05-11 13:55:02 -04:00
Rejeesh Kutty 2cd1d8a591 fmcadc4- ad9680 version 2015-05-11 13:55:02 -04:00
Rejeesh Kutty 0a6efaccca fmcadc4- ad9680 version 2015-05-11 13:55:02 -04:00
Rejeesh Kutty 848dac70d5 a10gx: updates-- 2015-05-11 11:56:27 -04:00
Rejeesh Kutty dc0eea5f0f a10gx: updates-- 2015-05-11 11:56:26 -04:00
Rejeesh Kutty bdc3f3d807 a10gx: updates-- 2015-05-11 11:56:24 -04:00
Rejeesh Kutty 75e055dab9 daq2/a10gx- initial commit 2015-05-11 11:56:23 -04:00
Rejeesh Kutty 515dfd88d4 a10gx- added 2015-05-11 11:56:22 -04:00
Rejeesh Kutty 4553de3ffa ad9361- align hold 2015-05-11 11:55:01 -04:00
Adrian Costina 14b721682d motcon1_fmc: Removed 2015-05-11 18:02:52 +03:00
Adrian Costina 3d4e9eb36a ac701: common, commit ethernet reset pin 2015-05-11 16:41:28 +03:00
Istvan Csomortani 15618c9edf daq2 : Integrate the DACFIFO into the supported projects.
+ All pack/unpack logic is made by the cpack and upack modules.
+ The DAC FIFO is integrated between the TX DMA and cpack.
+ All the top files are updated, all the projects compiled successfully.
2015-05-11 12:20:50 +03:00
Istvan Csomortani bad821ba1c sys_dmafifo: Update the p_sys_dacfifo process
Update the ports and parameters at util_dacfifo instantiation.
2015-05-11 12:20:47 +03:00
Istvan Csomortani 9934cce5d2 util_dacfifo: Add CDC logic for dma_lastaddr register. 2015-05-11 12:20:46 +03:00