AndreiGrozav
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e4ae391237
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axi adc cores: Add missing ports to up_adc_common instance
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2017-05-12 13:39:05 +03:00 |
Rejeesh Kutty
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fea6eb68be
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up_adc_common- port name changes
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2017-05-10 14:45:17 -04:00 |
Istvan Csomortani
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1c23cf4621
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all: Update verilog files to verilog-2001
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2017-04-13 11:59:55 +03:00 |
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AndreiGrozav
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91995c082d
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axi_ad9684: Fixed up_drp_*data width
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2016-10-12 13:20:26 +03:00 |
|
Istvan Csomortani
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ad16aec101
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axi_ad9684: Fix SERDES modules
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2016-09-26 11:14:35 +03:00 |
Shrutika Redkar
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6ebb32a194
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library axi-slave missing protection signal added
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2016-07-22 12:54:27 -04:00 |
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Istvan Csomortani
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c6cfd1a2b6
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axi_ad9684: Initial check in
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2016-01-19 11:13:45 +02:00 |