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3206 Commits (81e47edcd5fc97b7f3c3612573071d9b319dce8f)

Author SHA1 Message Date
István Csomortáni 81e47edcd5 README: Set links for documentation 2016-11-16 10:57:39 +02:00
rejeesh kutty fabbe4981e Update README.md 
updated
 2016-11-15 16:15:55 -05:00
Rejeesh Kutty 538a1c977f pzsdr2: make files 2016-11-15 16:00:55 -05:00
rejeesh kutty 4905e80df8 Update README.md 
updated
 2016-11-15 14:16:46 -05:00
Rejeesh Kutty db243df97e pzsdr2- updates 2016-11-15 14:16:06 -05:00
AndreiGrozav 0897716167 fmcadc4: xcvr updates 2016-11-15 16:03:52 +02:00
AndreiGrozav cac4057449 daq2/common: Altera updates 2016-11-15 16:03:52 +02:00
Rejeesh Kutty cfd3ea61f1 pzsdr-to-pzsdr2 2016-11-14 14:12:22 -05:00
AndreiGrozav 9d6c93a5d8 Fix warnings 2016-11-14 15:17:15 +02:00
Istvan Csomortani 12d6e46ae7 clean: Delete deprecated source files 
The axi_jesd_gt was repleaced by axi_adxcvr IP, which is located
at library/xilinx and library/altera.
The axi_jesd_xcvr was an early version of axi_adxcvr.
The register map is moved to the IP's directory.
 2016-11-14 10:43:46 +02:00
Rejeesh Kutty f64b44c8ac sdrstk2pluto- contents 2016-11-11 13:52:57 -05:00
Rejeesh Kutty 2ececad58c sdrstk-2-pluto 2016-11-11 13:49:04 -05:00
Adrian Costina c80033cb1b util_fir_int: removed s_axis_data_tvalid and updated sdrstk 2016-11-11 17:52:19 +02:00
Rejeesh Kutty e62fe0c086 fmcjesdadc1- a5gt/a5soc- sysclk is different 2016-11-11 10:34:18 -05:00
Adrian Costina 6f4dc92dd2 util_fir_int: Fix channel data assignment 2016-11-11 15:46:17 +02:00
Istvan Csomortani 7008c641b5 axi_adrv9371/zc706: Constraints update 
From source *jesd_rstgen* is a false path for TX and RX_OS too.
 2016-11-11 10:35:09 +02:00
Rejeesh Kutty 85eac8c811 fmcjesdadc1/a5*- updates 2016-11-10 16:57:06 -05:00
Rejeesh Kutty 959055bd54 common/a5gt- updates 2016-11-10 16:56:35 -05:00
Rejeesh Kutty 7a2c713a4e fmcjesdadc1/a5* - hdlmake.pl 2016-11-10 11:37:06 -05:00
Rejeesh Kutty c6730ab2d7 fmcjesdadc1/a5gt- updates 2016-11-10 11:36:41 -05:00
Rejeesh Kutty c207589f4b fmcjesdadc1/a5gt - qsys2tcl flow 2016-11-10 11:32:29 -05:00
Rejeesh Kutty 8af0731bb0 a5gt- qsys2tcl flow 2016-11-10 11:30:18 -05:00
Adrian Costina 7a606cbae1 sdrstk: Maximum clock frequency is 61.44 in CMOS mode 2016-11-10 17:45:35 +02:00
Adrian Costina 64d1d54ec0 util_fir_int: Update filter, as it's used with ad9361 in CMOS mode 2016-11-10 17:45:03 +02:00
Adrian Costina 66098b7ae7 util_fir_dec: Update filter, as it's used with ad9361 in CMOS mode 2016-11-10 17:43:04 +02:00
Adrian Costina d29ef14f36 sdrstk: Configured ad9361 in 1r1t mode 2016-11-10 17:06:42 +02:00
Istvan Csomortani a54092c9bb fmcjesdadc1: Update projects to xcvr framework 
This commit contains modifications for Xilinx only
 2016-11-10 10:59:52 +02:00
Istvan Csomortani 6073cdded4 axi_ad9250: Tie rx_valid to ground 2016-11-10 10:52:37 +02:00
Istvan Csomortani 8845aeb6ab axi_ad9250: Add missing file to Make and script 2016-11-10 10:48:46 +02:00
Istvan Csomortani d6918de19e ad6676: Update projects to xcvr frame work 2016-11-10 10:39:46 +02:00
Istvan Csomortani 8493bd4329 axi_ad6676: Update the core, sof interface added 2016-11-10 10:39:33 +02:00
Rejeesh Kutty 3cc416ca60 pzsdr1- fix typo on system_ps7 2016-11-09 12:04:30 -05:00
Istvan Csomortani 35c2dd5d6d adrv9371x/zc706: Fix constraints 2016-11-09 16:34:08 +02:00
Rejeesh Kutty 0b58a2a1db avl_adxcvr- sysclk frequency 2016-11-09 09:21:07 -05:00
Rejeesh Kutty aef3e87d7e fmcjesdadc1/a5soc -- xcvr frame work updates 2016-11-08 15:20:48 -05:00
Rejeesh Kutty 53c2f0642b fmcjesdadc1/a5soc -- xcvr frame work updates 2016-11-08 15:20:33 -05:00
Rejeesh Kutty 48ee720901 avl_adxcvr- a5 requires single transceiver controller 2016-11-08 15:20:01 -05:00
Rejeesh Kutty f0af8216ce common/a5soc- device can not run at 100M cpu clock 2016-11-08 15:19:23 -05:00
Rejeesh Kutty d9cfccc05f common/a5soc- gpio in/out separation 2016-11-08 15:19:02 -05:00
Rejeesh Kutty a58597c13a ad9250 - build fixes 2016-11-08 15:17:54 -05:00
Rejeesh Kutty d7357d781b axi_ad9250 - avalon/axi streaming + sof 2016-11-04 15:30:39 -04:00
Rejeesh Kutty acb9bf3902 hdlmake- a5soc/a5gt- updates 2016-11-04 15:02:57 -04:00
Rejeesh Kutty ee9c8b884d avlxcvr- add arria v support 2016-11-04 15:01:19 -04:00
Rejeesh Kutty 6b492b79db a10soc - remove default assignments 2016-11-04 15:01:19 -04:00
Rejeesh Kutty 8ea9beffaf fmcjesdadc1- a5soc tcl updates 2016-11-04 15:01:19 -04:00
Rejeesh Kutty 4e99c3be9a a5soc- tcl flow updates 2016-11-04 15:01:19 -04:00
Adrian Costina ce3b6a2d3f adrv9371x: Updated constraints for altera projects 2016-11-04 18:20:46 +02:00
Rejeesh Kutty 0dfbb0af11 arradio/c5soc- constraints changes- interface 1r1t 2016-11-03 11:25:52 -04:00
Adrian Costina 9dc7f16d80 axi_usb_fx3: Added zero length packet capability 2016-11-03 15:29:56 +02:00
Rejeesh Kutty 128ca7719a ccpci_lvds- rev.d. xcvr pin changes 2016-11-02 16:41:04 -04:00