Istvan Csomortani
|
1c23cf4621
|
all: Update verilog files to verilog-2001
|
2017-04-13 11:59:55 +03:00 |
Rejeesh Kutty
|
3586397f57
|
altera/common- add asymmetric fifo
|
2017-03-01 15:35:04 -05:00 |
|
Istvan Csomortani
|
0dae754f2d
|
axi_adxcvr: Add rparam register to Altera XCVR
|
2017-02-10 16:19:17 +02:00 |
|
Rejeesh Kutty
|
db924953bb
|
altera- warnings about init values
|
2017-01-30 10:01:28 -05:00 |
|
Rejeesh Kutty
|
c0a2ef1ac4
|
library- altera power up warnings
|
2016-12-20 16:18:15 -05:00 |
|
Istvan Csomortani
|
0715c962f1
|
altera/ad_serdes: Fix net alignment for rx_out at ad_serdes_in
|
2016-12-06 15:24:19 +02:00 |
|
Istvan Csomortani
|
6cf9df50e3
|
altera/ad_serdes: Define DEVICE_FAMILY in hw script
|
2016-12-06 15:24:18 +02:00 |
|
Rejeesh Kutty
|
0b58a2a1db
|
avl_adxcvr- sysclk frequency
|
2016-11-09 09:21:07 -05:00 |
|
Rejeesh Kutty
|
48ee720901
|
avl_adxcvr- a5 requires single transceiver controller
|
2016-11-08 15:20:01 -05:00 |
|
Rejeesh Kutty
|
ee9c8b884d
|
avlxcvr- add arria v support
|
2016-11-04 15:01:19 -04:00 |
|
Rejeesh Kutty
|
1e0fed82f7
|
alt_serdes- a10 ddio fixes
|
2016-11-01 12:41:25 -04:00 |
|
Rejeesh Kutty
|
9f4c5f8060
|
arradio/ad9361- updates
|
2016-10-31 15:34:32 -04:00 |
|
Rejeesh Kutty
|
b94cc8afb1
|
altera- cmos cores
|
2016-10-31 13:13:48 -04:00 |
|
Rejeesh Kutty
|
e0459df0f3
|
altera -c5 qsys alternative
|
2016-10-31 11:18:27 -04:00 |
|
Rejeesh Kutty
|
cc75fa3dfe
|
altera- java/tcl mess handling
|
2016-10-31 10:54:07 -04:00 |
|
Rejeesh Kutty
|
a9d03af771
|
altera- serdes changes
|
2016-10-28 14:09:18 -04:00 |
|
Rejeesh Kutty
|
8107514dde
|
altera/common- ad_serdes_clk
|
2016-10-27 09:41:10 -04:00 |
AndreiGrozav
|
6f611e0d10
|
altera/alt_serdes: Add support for Cyclone V
|
2016-10-25 20:32:51 +03:00 |
|
Istvan Csomortani
|
707038937a
|
alt_serdes: Add additional parameters
Add additional parameters to keep the top of ad_serdes_* modules
consistant through differente carriers.
|
2016-10-24 11:42:43 +03:00 |
|
AndreiGrozav
|
2d93d787ab
|
altera/ad_cdfilter: Update interface to Verilog 2001 standard
|
2016-10-11 17:59:21 +03:00 |
|
AndreiGrozav
|
ae47895666
|
altera/alt_serdes: Fixed SERDES 4 factor initialization
|
2016-10-11 17:59:17 +03:00 |
|
AndreiGrozav
|
d41945f568
|
altera/ad_serdes: Add support for any SERDES factor less than 8
|
2016-10-11 17:59:14 +03:00 |
|
Istvan Csomortani
|
6510f92c12
|
ad_serdes : Cosmetic changes
|
2016-09-16 14:45:39 +03:00 |
|
AndreiGrozav
|
13a35f7a2a
|
altera/ad_serdes_clk: The IO_PLL reset is active heigh
|
2016-09-16 14:20:39 +03:00 |
|
Istvan Csomortani
|
858ea09048
|
altera/ad_serdes_in: Fix some typos
|
2016-09-16 10:56:16 +03:00 |
|
Rejeesh Kutty
|
a2d15acb89
|
ad_serdes- altera/xilinx sync
|
2016-09-15 13:33:55 -04:00 |
|
Rejeesh Kutty
|
63696c1a28
|
alt_serdes- data-width parameter
|
2016-09-15 11:12:18 -04:00 |
|
Rejeesh Kutty
|
02dfd2d2e2
|
altera/ad_serdes_out- sample transmit order
|
2016-09-15 10:28:34 -04:00 |
|
Rejeesh Kutty
|
5986f45cba
|
altera/ad_serdes_out- updates
|
2016-09-15 09:38:11 -04:00 |
|
Rejeesh Kutty
|
fe133a7c39
|
v2001- parameter defines
|
2016-09-14 15:47:45 -04:00 |
|
Rejeesh Kutty
|
16046a984c
|
alt_serdes- updates
|
2016-09-14 12:05:48 -04:00 |
|
Rejeesh Kutty
|
4a6b554c0a
|
ad_serdes- updates
|
2016-09-14 11:12:53 -04:00 |
|
Rejeesh Kutty
|
a0318ae868
|
ad_serdes_clk- syntax errors
|
2016-09-13 14:02:11 -04:00 |
|
Istvan Csomortani
|
734b39a8ed
|
alt_serdes: Fix some issues in the _hw.tcl script
|
2016-09-13 17:42:51 +03:00 |
|
Rejeesh Kutty
|
73ebf1225c
|
axi_adxcvr- ip/phy split
|
2016-09-12 14:57:50 -04:00 |
|
Rejeesh Kutty
|
21545ee83f
|
avl_adxcvr- ip/phy split
|
2016-09-12 14:57:50 -04:00 |
|
Rejeesh Kutty
|
8718b7f477
|
avl_adxphy- ip/phy split
|
2016-09-12 14:57:50 -04:00 |
|
Rejeesh Kutty
|
d30ffdb7e9
|
avl_adxcfg- ip/phy split
|
2016-09-12 14:57:50 -04:00 |
|
Rejeesh Kutty
|
9159e31244
|
axi_adxcvr- compile fixes
|
2016-09-12 14:57:50 -04:00 |
|
Rejeesh Kutty
|
5a309d8863
|
avl_adxphy- split
|
2016-09-12 14:57:50 -04:00 |
|
Rejeesh Kutty
|
2a34f9baa8
|
alt-serdes, in & out
|
2016-09-12 11:45:23 -04:00 |
|
Rejeesh Kutty
|
9e0c39a71b
|
alt_serdes_clk- changes
|
2016-09-12 10:30:28 -04:00 |
|
Istvan Csomortani
|
f4be0524b4
|
altera/common: Add SERDES related modules
|
2016-09-09 18:04:41 +03:00 |
|
Rejeesh Kutty
|
4ae084ee32
|
avl_adxcvr- compile fixes
|
2016-09-01 10:06:28 -04:00 |
|
Rejeesh Kutty
|
5544e3cf10
|
axi_adxcvr- compile fixes
|
2016-09-01 10:06:28 -04:00 |
|
Rejeesh Kutty
|
230f1526c0
|
avl_adxcfg- compile fixes
|
2016-09-01 10:06:28 -04:00 |
|
Rejeesh Kutty
|
b7ea2efa87
|
altera- xcvr cores
|
2016-08-29 15:18:48 -04:00 |
Adrian Costina
|
6a8ca8107a
|
common: Added common ad_dcfilter stub for altera.
|
2016-08-16 17:37:16 +03:00 |
|
Istvan Csomortani
|
90ac7b7ac9
|
lib_refactoring: Move all Altera module to library/altera/common
Move all Altera modules to library/altera/common, delete the
deprecated wrapper files
|
2016-08-08 15:07:01 +03:00 |
|
Istvan Csomortani
|
cb9af99c5d
|
lib_refactoring: Add ad_mul.v for Altera
|
2016-08-08 15:06:48 +03:00 |
|
Adrian Costina
|
5faf4c4976
|
cleanup: Don't need Makefiles specific to xilinx/altera libraries. Top Makefile covers them
|
2016-08-05 16:27:52 +03:00 |
|
Rejeesh Kutty
|
2b7c976be5
|
xcvr- altera/xilinx split
|
2016-08-04 13:26:10 -04:00 |