961ebe0cc2
projects: Update .v files according to guideline
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Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.
Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
c71e5de928
zcu102: ad_fmclidar1_ebz, fmcomms5, fmcomms8 ( #811 )
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adrv2crr_fmc: adrv9009zu11eg
adrv2crr_xmicrowave: adrv9009zu11eg
The IBUFGDS primitive is deprecated in UltraScale devices.
2021-11-22 08:09:46 +02:00
591a23156b
Makefiles: Update header with the appropriate license
2021-09-16 16:50:53 +03:00
6f2f2b8626
makefile: Regenerate make files
2021-01-20 01:02:56 +02:00
acbbd4636a
sysid: Upgrade framework, header/ip are now at 2/1.1.a
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Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
2021-01-20 01:02:56 +02:00
2ff5420630
Update system_top.v
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Add a comment that the spi CS decoding is tied to a setting in the device tree.
2020-11-02 16:59:08 +02:00
9093a8c428
library: Move ad_iobuf to the common library, as it's not Xilinx specific
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Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
d8ab27b2af
sysid: Remove cstring init string
2020-09-30 19:12:24 +03:00
bde2d1d66d
fmcomms8: zcu102: Leave the SPI constraint at 25 MHz
2020-09-25 11:54:12 +03:00
f8c2eb12d4
fmcomms8: zcu102: Remove the test pins, as they are not connected
2020-09-25 11:54:12 +03:00
32eeedb660
makefile: Update makefiles
2020-05-07 08:41:49 +01:00
19b7986486
fmcomms8: Fix SPI timing
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The maximum SPI rate set to 10MHz
2020-03-16 13:26:20 +02:00
fad52175d1
fmcomms8: Fix spi connection
2020-03-06 16:07:02 +02:00
e51d9372cd
fmcomms8: ZCU102: Added DAC FIFO
2020-02-10 11:23:52 +02:00
016a1d540d
fmcomms8: ZCU102: Initial commit
2020-02-10 11:23:52 +02:00
Iulia Moldovan
PopPaul2021
Adrian Costina
Sergiu Arpadi
aholtzma
Istvan Csomortani