Rejeesh Kutty
0805da3b6b
fmcomms2/rfsom- enable dac delay
2015-05-18 16:45:54 -04:00
Rejeesh Kutty
3e51d29f75
enable/txnrx- tdd changes
2015-05-18 14:28:20 -04:00
Adrian Costina
c19749361d
Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
...
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Istvan Csomortani
d9a124b767
fmcomms2_zc706: TDD integration, initial commit.
2015-05-11 12:20:45 +03:00
Adrian Costina
293ec6a319
fmcomms2: c5soc project updated to 14.1
2015-05-08 17:44:16 +03:00
Adrian Costina
91279253ef
Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile
2015-05-08 15:31:40 +03:00
Adrian Costina
949abcdc8f
Makefile: Updated makefiles so that the project recipe does not depend on lib
2015-05-06 14:58:29 +03:00
Rejeesh Kutty
319f821fab
zc706pr - makefile
2015-05-04 13:41:03 -04:00
Rejeesh Kutty
ab85e2ba36
zc706pr - 706 partial reconfiguration
2015-05-04 12:36:57 -04:00
Rejeesh Kutty
c3dd9258e7
zc706: project mode
2015-05-04 10:25:12 -04:00
Rejeesh Kutty
62acd37fee
zc706: project mode
2015-05-04 10:25:07 -04:00
Rejeesh Kutty
ad551a0073
itx045: updates
2015-05-01 16:18:43 -04:00
Rejeesh Kutty
00cafd4df0
fmcomms2/zc706: add partial reconfiguration
2015-05-01 12:23:18 -04:00
Rejeesh Kutty
3641d8f714
fmcomms2/zc706: add partial reconfiguration
2015-05-01 12:23:11 -04:00
Rejeesh Kutty
75a81d67d8
fmcomms2/zc706: add partial reconfiguration
2015-05-01 12:23:07 -04:00
Rejeesh Kutty
140c622c8b
prcfg: common files
2015-05-01 11:48:09 -04:00
Rejeesh Kutty
a8d4c916c1
fmcomms2_bd: remove axi3 switch
2015-05-01 11:47:29 -04:00
Lars-Peter Clausen
3fd830b038
fmcomms2: Use AXI3 interface for the DMA on ZYNQ
...
On ZYNQ the HP interconnects have a AXI3 interface. The DMA controller
supports both AXI4 and AXI3. By switching to AXI3 there is no need to create
a protocol converter between the DMA and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-17 19:51:37 +02:00
Lars-Peter Clausen
71d4f3a474
fmcomms2: Don't mark synchronous paths as asynchronous for the DMAs
...
The AXI master interface and the register map AXI slave interface use the
same clock. No need to mark the interfaces as asynchronous. This removes the
need for CDC logic on those paths.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-17 19:51:37 +02:00
Adrian Costina
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
...
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina
374f82e7de
makefiles: The clean command for library won't remove the xml files, except for component.xml.
...
Updated also the dmac dependencies
2015-04-16 11:53:27 +03:00
Adrian Costina
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
Rejeesh Kutty
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
Adrian Costina
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
Adrian Costina
9745462d88
fmcomms2: VC707 fixed top file
2015-04-02 15:31:40 +03:00
Adrian Costina
9dac22c814
fmcomms2: ZC702 fixed GPIOs in top file
2015-04-02 15:30:41 +03:00
Adrian Costina
dbbdeeaa0c
fmcomms1: Updated AC701 project to new framework
2015-04-02 11:22:16 +03:00
Adrian Costina
a4e9dd5fc4
fmcomms2: KC705 updated project
2015-04-02 11:21:13 +03:00
Rejeesh Kutty
c46866e78c
makefile: added
2015-04-01 16:29:42 -04:00
Rejeesh Kutty
c5a67ad1cd
makefile: added
2015-04-01 16:29:41 -04:00
Rejeesh Kutty
74d3d458da
makefile: added
2015-04-01 16:29:39 -04:00
Rejeesh Kutty
b1cc047d04
makefile: added
2015-04-01 16:29:38 -04:00
Rejeesh Kutty
25a6a75a32
makefile: added
2015-04-01 16:29:37 -04:00
Rejeesh Kutty
c5ccd44ffb
makefile: added
2015-04-01 16:29:36 -04:00
Rejeesh Kutty
006a4fd209
makefile: added
2015-04-01 16:29:34 -04:00
Rejeesh Kutty
61bdb437b1
makefile: added
2015-04-01 16:29:33 -04:00
Rejeesh Kutty
970d5f8c3e
makefile: added
2015-04-01 16:29:32 -04:00
Rejeesh Kutty
5f149535b5
makefile: added
2015-04-01 16:29:31 -04:00
Adrian Costina
207b9679c9
fmcomms2: miniITX project updated to the new framework
2015-03-31 16:17:58 +03:00
Istvan Csomortani
b774379796
fmcomms2_zc706: Clean up system top
2015-03-24 13:38:48 +02:00
Adrian Costina
c1c6787b91
fmcomms2: Updated VC707 design with the latest base design
2015-03-20 18:22:48 +02:00
Rejeesh Kutty
8542c2b0d7
rfsom: sd1 to sd0 changes
2015-03-19 09:34:15 -04:00
Istvan Csomortani
f0d08abe03
fmcomms2: Fix system_top.v for a few carrier
...
Interrupts are connected inside IPI. Fix system_top for zed, zc702, zc706 and kc705.
2015-03-18 10:37:24 +02:00
Rejeesh Kutty
08a773b92d
fmcomms2/rfsom: interrupt fix
2015-03-17 16:31:12 -04:00
Istvan Csomortani
7bdce3837e
fmcomms2: Update interrupts
...
The new interrupts connections are made inside IPI by the process called 'ad_cpu_interrupt'.
2015-03-16 19:13:45 +02:00
Istvan Csomortani
65b16551c3
fmcomms2_kc705: Fix system_top connections
2015-03-16 19:12:04 +02:00
Istvan Csomortani
65654b77ff
fmcomms2_kc705: Update design to the new hdl framework
2015-03-13 18:54:28 +02:00
Istvan Csomortani
7befef6662
fmcomms2_zed: Update design to the new hdl framework
2015-03-13 18:52:57 +02:00
Adrian Costina
70e1d13a7b
fmcomms2: Updated project
2015-03-13 12:49:17 +02:00
Rejeesh Kutty
73680d1ed9
fmcomms2/ml605: removed
2015-03-12 11:59:18 -04:00
Rejeesh Kutty
1cf8092ba9
fmcomms2/zc706: spi/gpio changes
2015-03-10 16:06:22 -04:00
Rejeesh Kutty
631c71373a
fmcomms2/zc706: spi/gpio changes
2015-03-10 16:06:18 -04:00
Rejeesh Kutty
796a0f4f2b
fmcomms2/zc706: spi/gpio changes
2015-03-10 16:06:13 -04:00
Rejeesh Kutty
7012172f66
fmcomms2: spi/gpio moved to base design
2015-03-10 15:27:32 -04:00
Rejeesh Kutty
7da65ef3db
fmcomms2: spi/gpio moved to base design
2015-03-10 15:27:28 -04:00
Rejeesh Kutty
abae36b12f
fmcomms2: spi/gpio moved to base design
2015-03-10 15:27:22 -04:00
Rejeesh Kutty
9e57e919c4
fmcomms2: spi/gpio moved to base design
2015-03-10 15:26:57 -04:00
Rejeesh Kutty
288f5378ff
rfsom: schematic changes
2015-02-18 14:32:41 -05:00
Rejeesh Kutty
93e2bcd911
rfsom: schematic changes
2015-02-18 14:32:30 -05:00
Rejeesh Kutty
996e1b7970
rfsom: constraint updates
2015-02-03 14:20:34 -05:00
Adrian Costina
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
Rejeesh Kutty
b9e2c5659f
fmcomms2: 2014.4
2015-01-09 14:12:54 -05:00
Rejeesh Kutty
d2baf17ff0
rfsom: updated to rfsom
2014-12-23 14:04:02 -05:00
Rejeesh Kutty
3d1ba585ee
rfsom: updated to rfsom
2014-12-23 14:04:01 -05:00
Rejeesh Kutty
19c2da836c
rfsom: updated to rfsom
2014-12-23 14:03:59 -05:00
Rejeesh Kutty
4b571ded8f
fmcomms2/rfsom: initial commit
2014-12-23 14:03:56 -05:00
Rejeesh Kutty
8e41af7b92
fmcomms2: 2014.4 update
2014-12-23 14:03:54 -05:00
Adrian Costina
2ff72d60d1
fmcomms2: Updated VC707 project to fix ethernet problem
2014-12-19 15:45:05 +02:00
Adrian Costina
86ad9213e0
fmcomms2: Update c5soc system_timing script
2014-12-10 17:54:11 +02:00
Rejeesh Kutty
4cf435ee39
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Rejeesh Kutty
8b41034825
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Adrian Costina
7a55db59f6
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:19:08 +02:00
Adrian Costina
303a2683a2
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:26:58 +02:00
Adrian Costina
6227bc82c0
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:25:19 +02:00
Adrian Costina
2f77daf71d
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:21:20 +02:00
Adrian Costina
ad08c62b36
fmcomms2: Updated zc702 project. Updated interrupts. Updated constraints
2014-11-07 14:01:55 +02:00
Adrian Costina
4e11e39956
fmcomms2: Updated zed project
...
- Updated interrupt system to the latest implementation
- Fixed constraints
2014-11-07 13:59:46 +02:00
Adrian Costina
962df53946
fmcomms2: Updated kc705 project to vivado 2014.2.
...
- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:58:40 +02:00
Adrian Costina
db18ed4af2
fmcomms2: Updated ac701 project to vivado 2014.2.
...
- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:56:00 +02:00
Adrian Costina
7e2a9ce569
fmcomms2: Updated base design interrupt system for microblaze
2014-11-07 13:54:43 +02:00
Adrian Costina
6fac294b6f
fmcomms2: Updated zc706 project to new interrupt system
2014-10-31 14:15:29 +02:00
Adrian Costina
d04a545a41
fmcomms2: updated zc706 project with new constraint style
2014-10-27 19:27:36 +02:00
Istvan Csomortani
17675863e0
all_projects: Fix the interrupt connections to preserve IRQ layout
2014-10-22 11:48:08 +03:00
Istvan Csomortani
4b8720b551
fmcomms2_zc706: Remove top level constraints
...
Remove all the unnecessary top level constraint definitions.
2014-10-20 13:25:01 +03:00
Istvan Csomortani
f528873fa9
fmcomms2: Add an additional SPI interface for up/down converter board
...
Supported carriers are: ZC706, ZC702 and Zed.
2014-10-10 18:47:07 +03:00
Istvan Csomortani
ca4c961891
fmcomms2: Use ad_iobuf instance on system_top
...
Use ad_iobuf instance on system top, instead of separate IOBUF instances.
2014-10-10 18:45:39 +03:00
Istvan Csomortani
e21d26e456
fmcomms2: Cosmetic changes
...
Get rid of unwanted whitespaces.
2014-10-10 18:25:17 +03:00
Istvan Csomortani
fe8a076b2e
fmcomms2: Cosmetic changes on *_bd.tcl script
2014-10-10 17:06:32 +03:00
Lars-Peter Clausen
7a9e694446
fmcomms2: Connect DMA directly to the HP ports
...
The DMA controller is able to send AXI3 compatible requests, no need to add
a interconnect for protocol conversion in between the DMA controller and the
HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-10 16:25:14 +03:00
Lars-Peter Clausen
87047fd83e
fmcomms2: Set dac_unpack channels to 4
...
There are only 4 DAC channels in the fmcomms2 design, so set the number of
channels of the dac_unpack core to 4. This slightly reduces resource usage
as well as reducing the DMA alignment requirement from 128bit to 64bit. The
later value is what existing applications expect the alignement requirement
to be.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-10 16:25:06 +03:00
Istvan Csomortani
2da395926e
fmcomms2: Upgrade project to 2014.2
2014-10-09 18:54:33 +03:00
Adrian Costina
7e40f99fe9
fmcomms2: Improved constraints for ac701 and zc702. Fixed common design so that ILA works correctly on microblaze based systems
2014-09-23 22:28:27 -04:00
Adrian Costina
f43b5d707e
fmcomms2: Reduced clock frequency for ILA to meet timing for ZED
...
Modified ZED constraints to 250 MHz for the clock from AD9361
2014-09-16 16:08:28 -04:00
Lars-Peter Clausen
d8651cdd2e
fmcomms2: c5soc: Set dac_util_unpack number of channels to 4
...
We only do have 4 channels in this design. Reducing the number of supported
channels for the dac_util_unpack core to 4 from 8 lowers the DMA alignment
requirement from 128bit to 64bit. We need this since applications only
expect a DMA alignment requirement of 64bit.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-12 16:15:12 +02:00
Lars-Peter Clausen
ecc498313c
fmcomms2: c5soc: Connect ADC, DAC and VGA DMA to different bridge interconnects
...
We have enough bridge interconnect to give each DMA its own, so use them.
This makes sure that they do not interfere with each others transfers to
much. The SDRAM controller side of the FPGA2SDRAM bridges FIFO runs at a
much faster frequency then what we are able to use in the fabric. So its
better to do the arbitration on that side of the bus to make sure that we
can utilize the buses in the FPGA fabric to the maximum for each DMA core.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-12 16:14:07 +02:00
Adrian Costina
61f21a17b3
fmcomms2:c5soc project upgraded with util_dac_unpack
2014-09-11 15:13:09 -04:00
Lars-Peter Clausen
4c1c50788e
fmcomms5: c5soc: Fix typo
...
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-11 17:15:10 +02:00
Lars-Peter Clausen
c7989925c5
fmcomms2: c5soc: Add false path between 50MHz and VGA PLL clock
...
Otherwise we get timing errors for the reset signal that is generated in the
50MHz clock domain, but used in the VGA PLL clock domain.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-09 15:05:06 +02:00
Lars-Peter Clausen
328205c31d
fmcomms2: c5soc: Set DMA transfer length to 24 bits
...
14 bits is a bit to low and we use 24 bits everywhere else as well.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-09 15:05:06 +02:00
Lars-Peter Clausen
50faf0c53a
Remove executable flags from non-exectuable files
2014-09-09 15:05:06 +02:00