Adrian Costina
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
Rejeesh Kutty
65d9f08763
zc706: mig 2014.4
2015-01-09 14:12:52 -05:00
Rejeesh Kutty
868df1aac8
zc706: mig 2014.4
2015-01-09 14:12:51 -05:00
Adrian Costina
f566268db5
zed_common: Updated common to 2014.4
2015-01-08 11:59:26 +02:00
Rejeesh Kutty
eb569b991d
dmafifo- remove util fifo setup
2015-01-06 16:23:14 -05:00
Rejeesh Kutty
9e707d8a33
rfifo: wrapper updates
2015-01-06 16:17:33 -05:00
Rejeesh Kutty
a944deebd5
wfifo: wrapper updates
2015-01-06 16:17:25 -05:00
Rejeesh Kutty
61ba4f4357
rfsom: updated to rfsom
2014-12-23 14:03:58 -05:00
Rejeesh Kutty
614dfcd93c
rfsom: updated to rfsom
2014-12-23 14:03:57 -05:00
Rejeesh Kutty
ee52602c89
rfsom: initial commit
2014-12-23 14:03:55 -05:00
Rejeesh Kutty
0de1a38245
zc706: 2014.4 update
2014-12-23 14:03:52 -05:00
Adrian Costina
71baa129a7
VC707: Fixed linear flash timings
2014-12-19 15:45:14 +02:00
Istvan Csomortani
59e610be09
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-17 19:07:43 +02:00
Rejeesh Kutty
77fa96fa67
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:54 -05:00
Rejeesh Kutty
ed7f8b4908
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:44 -05:00
Istvan Csomortani
caa0268434
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:13:07 +02:00
Rejeesh Kutty
e7c920bbd9
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Istvan Csomortani
a6b7b9d880
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:20:39 +02:00
Michael Hennerich
7e18162632
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:48:37 +01:00
Istvan Csomortani
34ffa15b12
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00
Michael Hennerich
3cc890e604
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:49:09 +01:00
Michael Hennerich
3bc9b25e96
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:47:02 +01:00
Istvan Csomortani
12f1873e17
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:08:55 +02:00
Istvan Csomortani
c0f4d7e2b5
mitx045_common: Definition file patch
...
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.
NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
Rejeesh Kutty
cdd1408d3c
dmafifo: parameterized address width
2014-11-20 09:28:02 -05:00
Istvan Csomortani
e3378cd6cb
mitx045_board_definition: revert old board definition file
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Revert commit 4f6aa159b8
. Those changes won't solve the issue.
mitx045.xml is the supported version under 2013.4
2014-11-18 10:05:55 +02:00
Istvan Csomortani
5baa015246
kc705_base: Delete timing constraints
2014-11-13 16:30:37 +02:00
Rejeesh Kutty
074662a622
dmafifo: common interface with fifo2s
2014-11-12 15:24:31 -05:00
Rejeesh Kutty
c6af2696b3
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:48 -05:00
Adrian Costina
05ed98f884
common: Updated common constratins for ac701, kc705, vc707, zc702
2014-11-11 12:35:44 +02:00
Rejeesh Kutty
2d9a529ab8
kcu105: ddr - 800M
2014-11-06 16:50:37 -05:00
Adrian Costina
4634a4f868
vc707: Added linear flash to the base design
2014-11-05 17:18:40 +02:00
Istvan Csomortani
4f815b99a1
kc705_base: Fix sys_concat_intc input connections
...
All the unused input pins need to be connected to ground.
2014-11-03 13:02:08 +02:00
Istvan Csomortani
f7588131da
ac701_base: Interrupt update
2014-11-03 13:02:04 +02:00
Istvan Csomortani
b92636c6eb
kc705_base: Interrupt update
2014-11-03 13:02:03 +02:00
Istvan Csomortani
16cdae3001
mitx045_base: Delete unnecessary timing constraints.
2014-10-31 11:50:49 +02:00
Istvan Csomortani
67bec719f7
mitx045_base: Interrupt update
2014-10-31 11:45:33 +02:00
Rejeesh Kutty
56859ad4c9
sys_dmafifo: use internal memory
2014-10-30 15:26:28 -04:00
Istvan Csomortani
7ae003cf82
zed_base: Interrupt update
2014-10-30 19:00:05 +02:00
Istvan Csomortani
ba53e156e3
ZC702_base: Interrupt update
2014-10-30 18:39:49 +02:00
Rejeesh Kutty
f595b86576
kcu105: lutram constraints for ies
2014-10-30 11:20:27 -04:00
Rejeesh Kutty
4c0e4d280f
dmafifo: internal version- light duty
2014-10-30 11:12:13 -04:00
Rejeesh Kutty
360e7104b6
dmafifo: axi version- heavy duty
2014-10-30 11:12:12 -04:00
Rejeesh Kutty
2e01ad2eec
ad9625_fmc/zc706: ps7 interrupt updates
2014-10-29 12:13:44 -04:00
Rejeesh Kutty
f83622a2e6
daq2/kcu105: interrupt updates
2014-10-28 15:51:42 -04:00
Rejeesh Kutty
4788d09620
vc707: interrupt updates
2014-10-28 15:42:55 -04:00
Istvan Csomortani
a870603db5
common_bd: Update the common block designs to the new IRQ path
...
Avoid the use of xil_concat module by using the ad_interrupts.
2014-10-27 19:44:25 +02:00
Rejeesh Kutty
d1e3993bd0
kcu105: daq2 updates
2014-10-27 09:59:56 -04:00
Rejeesh Kutty
d471b61f3e
fifo: merge zynq and non-zynq
2014-10-27 09:59:54 -04:00
Istvan Csomortani
10b898a62d
zed_base: Fix IRQ layout.
...
Just a temporally fix of IRQ layout.
2014-10-27 14:46:26 +02:00
Rejeesh Kutty
43cdafe1e2
kcu105: iic-rstn removed
2014-10-22 16:33:52 -04:00
Istvan Csomortani
dcdba475f7
vc707_common: Fix net name sys_100m_resetn
2014-10-22 15:41:36 +03:00
Istvan Csomortani
767179dce9
adv7511_zc706: Fix IRQ layout
...
Fix IRQ connection, this layout works on Linux
2014-10-21 17:44:28 +03:00
Istvan Csomortani
5deffd57b1
zed: Remove top level constraints
...
Remove top level constraints from the ZED base design.
2014-10-20 13:20:27 +03:00
Rejeesh Kutty
14ccdaaa78
kcu105: removed spdif reset
2014-10-17 14:00:00 -04:00
Rejeesh Kutty
e73b3b52dc
kcu105: ethernet fix
2014-10-17 13:47:50 -04:00
Rejeesh Kutty
6d76e0b768
zc706: remove top level constraints
2014-10-15 14:51:02 -04:00
Rejeesh Kutty
5715c5b28f
dmafifo: axi stream interface
2014-10-15 14:50:57 -04:00
Lars-Peter Clausen
7d3be14ab5
common: Connect audio clkgen reset
...
While we are at it also hide the unused locked pin.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:44:46 +03:00
Lars-Peter Clausen
fd89458708
common: Set cpu interconnect strategy to minimize area
...
There will rarely be concurrent access to the peripheral control bus
interconnect, so there is no need to optimize for performace. Setting the
interconnect strategy to minimize area can reduce the resource usage by
~90%.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:43:54 +03:00
Istvan Csomortani
d2a04856a9
common: Fix xlconstant output pin name
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On 2014.2 xlconstant output pin name is 'dout'.
2014-10-15 15:37:06 +03:00
Lars-Peter Clausen
43e9b0c7a6
common: Disable TTC0 MMIO routing for PS7
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We do not use the ttc0 to MMIO routing, but it is enabled by default, so
explicitly disable it.
2014-10-10 16:19:51 +03:00
Istvan Csomortani
4f6aa159b8
mitx045: Base design now support 2014.2
2014-10-09 15:11:28 +03:00
Michael Hennerich
cd42345324
projects/common/xxx/xxx_system_bd.tcl: 'Update microblaze defaults
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-07 09:17:24 +02:00
Rejeesh Kutty
f0927afd0b
ad9625_fmc: add dma fifo for non-zynq
2014-10-01 14:51:14 -04:00
Adrian Costina
041d8faaf7
common: Updated common projects for ac701/kc702/zc702/zed to vivado 2014.2
2014-09-30 10:31:00 +03:00
Rejeesh Kutty
7c98a783c5
2014.2 updates
2014-09-23 12:32:33 -04:00
Istvan Csomortani
dd7bac41c1
daq1 : Update project to 2014.2
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- Cores are upadted
- Concat module does not swap output anymore
- Clock signal name ps7_clk_* changed to clk_fpga_*
2014-09-22 17:33:50 +03:00
Rejeesh Kutty
fb5d212370
daq2/kcu105: fixed timing violations
2014-09-19 15:55:42 -04:00
Michael Hennerich
a3dbd5ac00
projects/common/vc707/vc707_system_bd: AD9625_FMC update to 2014.2
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-09-16 14:59:36 +02:00
Lars-Peter Clausen
41cc92ef49
Remove BASEADDR/HIGHADDR parameters
...
This is unused and unneeded. The AXI interconnect will make sure that a
peripheral only gets requests that are meant for it, there is no need to
check the address in the peripheral itself.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-11 12:26:37 +02:00
Michael Hennerich
647a26e19c
projects/common/vc707/vc707_system_bd.tcl: Select Linux MMU settings
2014-09-10 17:40:36 +02:00
Lars-Peter Clausen
50faf0c53a
Remove executable flags from non-exectuable files
2014-09-09 15:05:06 +02:00
Rejeesh Kutty
b58e425b44
daq2/kcu105: timing improvement -register slices hang
2014-09-08 10:24:56 -04:00
Rejeesh Kutty
72f31370ef
a5gt: ethernet-fpga lvds mode
2014-09-04 11:19:25 -04:00
Rejeesh Kutty
3deb55bb98
a5gt: ethernet i/o changed to lvds
2014-09-04 11:19:24 -04:00
dbogdan
5a42c10233
projects/fmcomms2/c5soc: Added video output. HPS SPI was replaced by 3 Wire SPI.
2014-08-27 21:46:23 +03:00
Rejeesh Kutty
7b280b3bbf
fmcomms6: zc706 build-only version
2014-08-27 10:44:37 -04:00
Adrian Costina
a49eb5853b
ZED, ZC702: Added contraints so that projects can successfully synthesize on linux systems
...
For ZC706 Fixed one constraint which was not correct
2014-08-26 16:28:41 +03:00
Rejeesh Kutty
cb29b83b05
a5gt: updates to match a5gt
2014-08-25 10:46:59 -04:00
Rejeesh Kutty
b481df0b5f
library: local constraints async groups
2014-08-14 15:09:51 -04:00
Rejeesh Kutty
39bb7ca231
a5soc: fmcjesdadc1+hdmi version
2014-08-14 09:05:38 -04:00
Rejeesh Kutty
96969079ce
a5soc: fixes for 14.0 and spi conflicts
2014-08-11 16:46:37 -04:00
Adrian Costina
6c6cab0e16
fmcomms2: ZC706 modified constraints for linux build machines
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The added constraints allow the project to successfully pass timing on some ubuntu or debian build machines.
2014-08-01 17:34:36 +03:00
Rejeesh Kutty
663588eeaf
daq2/kcu105: working ddr version
2014-07-29 09:15:30 -04:00
Rejeesh Kutty
db2386a351
daq2/kcu105: latest mig updates
2014-07-23 16:25:55 -04:00
Istvan Csomortani
db1c931736
ad9625_plddr: PL DDR3 fixes
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- Modified the axi slave interface handler
- Increased the rfifo_mem input depth to prevent overflow
2014-07-23 19:34:44 +03:00
Istvan Csomortani
2b6ce1e504
zc706_plddr3 : Fix axi_fifo2s_axi_mrst net
2014-07-21 15:10:36 +03:00
Rejeesh Kutty
2955b9db78
fifo2s: flush if no request, c5soc: 14.0
2014-07-15 16:25:33 -04:00
Rejeesh Kutty
b434fe6dd5
fmcomms5: register map changes
2014-07-08 16:57:43 -04:00
Rejeesh Kutty
c75e6b3043
kcu105 pwr-good removed
2014-07-07 09:56:13 -04:00
Rejeesh Kutty
a388ccab0a
fmcomms2/c5soc: initial checkin
2014-07-02 14:56:00 -04:00
Rejeesh Kutty
c1b7fc17f5
c5soc: initial a5soc copy
2014-07-01 13:05:26 -04:00
Rejeesh Kutty
e38813fa9f
fifo- monitor status signals
2014-06-25 12:15:13 -04:00
Rejeesh Kutty
57bb3705f2
zc706-plddr3: read changes to lower dma clock
2014-06-25 09:20:58 -04:00
Rejeesh Kutty
6ea7dd7fc3
kcu105: pwr-good added
2014-06-12 15:22:31 -04:00
Adrian Costina
2837d788a6
mitx045: Added I2S core to the base design
2014-06-06 17:53:47 +03:00
Rejeesh Kutty
cf56a568c6
kcu105: GTH updates
2014-06-05 14:27:38 -04:00
Adrian Costina
45325b7c0d
mitx045: minor changes in common and ADV7511 projects
2014-06-03 19:24:12 +03:00
Adrian Costina
c52327d0c6
common,adv7511: Added mitx045 platform.
2014-06-02 11:08:03 +03:00