Adrian Costina
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623e732ee6
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kc705: Updated base project with linear flash. Updated all depending projects
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2015-01-13 10:07:51 +02:00 |
Michael Hennerich
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138e789fb6
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projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
sys_concat_intc: don't reset NUM_PORTS to 6
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
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2014-12-09 17:38:16 +01:00 |
Istvan Csomortani
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915ee7a268
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fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
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2014-12-09 11:54:16 +02:00 |
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Istvan Csomortani
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84f8377beb
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fmcjedadc1_vc707: Add support for linear flash interface
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2014-11-21 19:19:21 +02:00 |
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Istvan Csomortani
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e8546b9c3b
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fmcjesdadc1: Update interrupts for KC705 and VC707
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2014-11-21 19:18:30 +02:00 |
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Istvan Csomortani
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b0f571ce0c
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fmcjesdadc1: Fix parameter lane number for GT core
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2014-11-21 19:17:29 +02:00 |
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Istvan Csomortani
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57137df018
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fmcjesdadc1_zc706: Interrupt update
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2014-11-03 13:02:09 +02:00 |
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Istvan Csomortani
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17675863e0
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all_projects: Fix the interrupt connections to preserve IRQ layout
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2014-10-22 11:48:08 +03:00 |
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Istvan Csomortani
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02802644bf
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fmcjesdadc1: Fix a few warning and issue with ILA
+ GPIO width is 15
+ Fix ILA core
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2014-10-15 15:37:05 +03:00 |
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Istvan Csomortani
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6f77af4aff
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fmcjesdadc1: Upgrade project to 2014.2
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2014-10-09 18:55:27 +03:00 |
Lars-Peter Clausen
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50faf0c53a
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Remove executable flags from non-exectuable files
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2014-09-09 15:05:06 +02:00 |
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Istvan Csomortani
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9f3461b130
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fmcjesdadc1: Added support for KC705
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2014-09-02 18:02:25 +03:00 |
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Istvan Csomortani
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2ce7695bf7
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fmcjesdadc1: Initial commit of VC707 version
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2014-09-01 18:47:01 +03:00 |
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Istvan Csomortani
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9a80fec4e4
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fmcjesdadc1: Delete trailing whitespaces
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2014-09-01 18:45:20 +03:00 |
Rejeesh Kutty
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5f21f54463
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fmcjesdadc1: zc706 version
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2014-08-25 14:28:57 -04:00 |
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Rejeesh Kutty
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cb29b83b05
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a5gt: updates to match a5gt
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2014-08-25 10:46:59 -04:00 |
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Rejeesh Kutty
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76ffb939e5
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zc706: ad9625 copy
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2014-08-22 11:24:24 -04:00 |
|
Rejeesh Kutty
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39bb7ca231
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a5soc: fmcjesdadc1+hdmi version
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2014-08-14 09:05:38 -04:00 |
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Rejeesh Kutty
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96969079ce
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a5soc: fixes for 14.0 and spi conflicts
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2014-08-11 16:46:37 -04:00 |
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Rejeesh Kutty
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60dd14bcdb
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a5soc: removed jtag master control
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2014-07-01 12:27:37 -04:00 |
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Rejeesh Kutty
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92e525d573
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ad9250: register map updates
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2014-06-25 15:24:48 -04:00 |
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Rejeesh Kutty
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4d4f66fbdd
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a5soc: increase pipeline for qsys
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2014-05-04 10:38:53 -04:00 |
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Rejeesh Kutty
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b55d0d7ad1
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a5soc: constraints for false paths
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2014-04-30 16:14:30 -04:00 |
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Rejeesh Kutty
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0b1ce14842
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a5soc: basic hardware build
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2014-04-30 12:40:27 -04:00 |
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Rejeesh Kutty
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99d66e7580
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a5soc: initial-copy version
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2014-04-30 12:40:26 -04:00 |
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Rejeesh Kutty
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33979fc533
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fixes to improve timing - fifo for clock domain transfers
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2014-04-04 13:49:53 -04:00 |
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Rejeesh Kutty
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6a19b34a00
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a5gt: added tightly coupled memory
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2014-04-03 20:50:17 -04:00 |
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Rejeesh Kutty
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12e5cc91bd
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make signaltap/timing part of the flow
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2014-04-03 20:50:15 -04:00 |
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Rejeesh Kutty
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e85153b5dd
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altera hal version
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2014-04-01 21:12:11 -04:00 |
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Rejeesh Kutty
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04df908fbf
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altera-fmcjesdadc1 initial checkin
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2014-04-01 12:01:57 -04:00 |
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Rejeesh Kutty
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0d678b89ed
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altera a5gt fmcjesdadc1 setup
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2014-04-01 11:46:37 -04:00 |