Lars-Peter Clausen
5b58fb67f0
library: Remove empty constraint files
...
Most of the cores are fully covered by the generic constraint files. When
the constraints where moved from the core specific to the generic
constraint files some empty core constraints files where left around. These
don't do anything, so remove them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-04-11 15:09:54 +03:00
Lars-Peter Clausen
dec0661f87
Move Xilinx specific DC filter implementation to library/xilinx/common/
...
The DC filter implementation in library/common/dc_filter.v is Xilinx
specific as it uses the Xilinx DSP48 hard-macro. There is a matching Altera
specific implementation in library/altera/common/dc_filter.v.
Move the Xilinx specific implementation from the generic common folder to
the Xilinx specific common folder in library/xilinx/common/ since that is
where all other Xilinx specific common modules reside.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-04-11 15:09:54 +03:00
Adrian Costina
74b922f9f8
axi_*: Infer clock and reset signals of an IP
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A clock sink must be connected to clock source, and a reset sink to
reset source, otherwise the tool will throw a synthesis warning.
By properly inferring all the reset and clock signals of an IP, we can
get rid of unwanted warning messages.
The following IPs tcl script was updated:
- axi_ad9434
- axi_hdmi_tx
- util_cpack
- util_adxcvr
- axi_ad6676
- axi_ad9625
- axi_ad9379
- axi_ad9265
- util_tdd_sync
- util_rfifo
- util_wfifo
- axi_ad9361
- axi_ad9467
- util_upack
- axi_dacfifo
- axi_ad9152
- axi_ad9680
- util_clkdiv
- axi_ad9122
- axi_ad9684
- axi_mc_speed
- axi_mc_current_monitor
- axi_mc_controller
- util_gmii_to_rgmii
- util_adxcvr
- axi_ad9379
- axi_hdmi
- library
- axi_fmcadc5_sync
- util_adcfifo
- util_mfifo
- axi_jesd204_rx
- axi_jesd204_tx
- axi_ad9361
- axi_adxcvr_ip
2018-04-11 15:09:54 +03:00
Rejeesh Kutty
893af8d3e6
library & projects- ad_lvds/ad_data replace
2017-07-26 10:31:48 -04:00
Istvan Csomortani
c1bdfca4c3
library: Delete all adi_ip_constraint process call
2017-04-06 12:36:47 +03:00
Istvan Csomortani
873fbfd6d7
library: Update scripts with new constraints
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Update all IPs tcl scripts with the new constraints files.
Refer to commit 335fef0
.
2017-03-30 16:16:02 +03:00
Istvan Csomortani
df36902713
lib_refactoring: Fix path of the IO macros
2016-08-08 15:07:19 +03:00
Adrian Costina
e33403816c
axi_ad9265: Updated core with latest constraints
2015-09-11 11:26:28 +03:00
Istvan Csomortani
7b858bc5ad
Revert commit 6b99ce
...
Revert 6b99ce2482
2015-08-26 13:48:28 +03:00
Adrian Costina
6b99ce2482
library: Added common constraints for all cores. Commented code that needs to be updated to 2015.2
2015-08-20 18:17:38 +03:00
Adrian Costina
a598e1c614
axi_ad9265: Set default driver value for overflow and underflow ports
2015-06-08 17:50:23 +03:00
Rejeesh Kutty
91b0f70972
library: remove drp cntrl
2015-06-02 09:58:57 -04:00
Adrian Costina
a6cb6b7672
axi_ad9265: Added CDC and reset constraints
2015-04-23 10:27:29 +03:00
Adrian Costina
1d4bc47cea
ad9265: Initial commit
2014-09-23 22:51:42 -04:00