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3272 Commits (6cf9df50e3a7bda4427a491748bf19bf5195859f)

Author SHA1 Message Date
Rejeesh Kutty aef3e87d7e fmcjesdadc1/a5soc -- xcvr frame work updates 2016-11-08 15:20:48 -05:00
Rejeesh Kutty 53c2f0642b fmcjesdadc1/a5soc -- xcvr frame work updates 2016-11-08 15:20:33 -05:00
Rejeesh Kutty 48ee720901 avl_adxcvr- a5 requires single transceiver controller 2016-11-08 15:20:01 -05:00
Rejeesh Kutty f0af8216ce common/a5soc- device can not run at 100M cpu clock 2016-11-08 15:19:23 -05:00
Rejeesh Kutty d9cfccc05f common/a5soc- gpio in/out separation 2016-11-08 15:19:02 -05:00
Rejeesh Kutty a58597c13a ad9250 - build fixes 2016-11-08 15:17:54 -05:00
Rejeesh Kutty d7357d781b axi_ad9250 - avalon/axi streaming + sof 2016-11-04 15:30:39 -04:00
Rejeesh Kutty acb9bf3902 hdlmake- a5soc/a5gt- updates 2016-11-04 15:02:57 -04:00
Rejeesh Kutty ee9c8b884d avlxcvr- add arria v support 2016-11-04 15:01:19 -04:00
Rejeesh Kutty 6b492b79db a10soc - remove default assignments 2016-11-04 15:01:19 -04:00
Rejeesh Kutty 8ea9beffaf fmcjesdadc1- a5soc tcl updates 2016-11-04 15:01:19 -04:00
Rejeesh Kutty 4e99c3be9a a5soc- tcl flow updates 2016-11-04 15:01:19 -04:00
Adrian Costina ce3b6a2d3f adrv9371x: Updated constraints for altera projects 2016-11-04 18:20:46 +02:00
Rejeesh Kutty 0dfbb0af11 arradio/c5soc- constraints changes- interface 1r1t 2016-11-03 11:25:52 -04:00
Adrian Costina 9dc7f16d80 axi_usb_fx3: Added zero length packet capability 2016-11-03 15:29:56 +02:00
Rejeesh Kutty 128ca7719a ccpci_lvds- rev.d. xcvr pin changes 2016-11-02 16:41:04 -04:00
Rejeesh Kutty 1cbea90bac altera - a10gx bank swap 2016-11-01 12:41:25 -04:00
Rejeesh Kutty 1e0fed82f7 alt_serdes- a10 ddio fixes 2016-11-01 12:41:25 -04:00
Rejeesh Kutty 671a547c2b hdlmake- updates 2016-11-01 12:41:25 -04:00
Istvan Csomortani 5eff357568 up_tdd_cntrl: Fix memory map register writes 2016-11-01 10:06:57 +02:00
Rejeesh Kutty 9f4c5f8060 arradio/ad9361- updates 2016-10-31 15:34:32 -04:00
Rejeesh Kutty b94cc8afb1 altera- cmos cores 2016-10-31 13:13:48 -04:00
Rejeesh Kutty e0459df0f3 altera -c5 qsys alternative 2016-10-31 11:18:27 -04:00
Rejeesh Kutty cc75fa3dfe altera- java/tcl mess handling 2016-10-31 10:54:07 -04:00
Rejeesh Kutty a9d03af771 altera- serdes changes 2016-10-28 14:09:18 -04:00
Adrian Costina d010f3e687 sdrstk: Update Makefile to remove pack/cpack dependancy and add util_fir_dec/util_fir_int dependancy 2016-10-28 16:13:52 +03:00
Adrian Costina f2e12cc88f util_fir_dec: Shifted the output data to the left so that the amplitude remains 
constant
 2016-10-28 15:18:36 +03:00
Adrian Costina d9b756e7ad util_fir_int: Shifted the output data to the left so that the amplitude remains constant 2016-10-28 15:17:30 +03:00
Adrian Costina ac8a6124af sdrstk: Added interpolation and decimation filters. Removed cpack/upack 2016-10-27 19:33:28 +03:00
Adrian Costina 30314e4492 library: Added util_fir_int and util_fir_dec interpolation/decimation filters 2016-10-27 19:31:50 +03:00
Rejeesh Kutty 8107514dde altera/common- ad_serdes_clk 2016-10-27 09:41:10 -04:00
Rejeesh Kutty 50552ce7d6 adrv9371x- altera updates 2016-10-27 09:25:00 -04:00
Rejeesh Kutty f752f0c9d7 a10soc- xcvr updates 2016-10-27 09:25:00 -04:00
Rejeesh Kutty f7e3703b98 axi_ad9371- avalon-s interfaces 2016-10-27 09:25:00 -04:00
Adrian Costina d4c7b7ca57 ccusb_lvds: Fixed IIC constraints 2016-10-26 11:12:02 +03:00
Adrian Costina 6607aa707d pzsdr1: Renamed projects to have lvds/cmos sufix 2016-10-26 11:09:43 +03:00
Adrian Costina 9ff92fdf5b pzsdr: Renamed projects to have lvds/cmos sufix 2016-10-26 11:07:29 +03:00
AndreiGrozav b8363d778d arradio: Makefile update 2016-10-25 20:36:56 +03:00
AndreiGrozav 6f611e0d10 altera/alt_serdes: Add support for Cyclone V 2016-10-25 20:32:51 +03:00
AndreiGrozav 08cef5a745 axi_ad9361: Add Cyclone V SERDES support 2016-10-25 20:24:17 +03:00
Adrian Costina 138eeebc9b ccusb_lvds: Initial commit 2016-10-25 16:32:44 +03:00
Rejeesh Kutty 5731ba3300 fmcomms11- xcvr updates 2016-10-24 09:51:40 -04:00
Istvan Csomortani 7e57a89ce5 daq1: Add support for A10GX 2016-10-24 11:43:33 +03:00
Istvan Csomortani de0c487195 axi_ad9684: Add Altera support for the core 2016-10-24 11:43:22 +03:00
Istvan Csomortani 3f3606d318 axi_ad9122: Add Altera support for the core 2016-10-24 11:43:12 +03:00
Istvan Csomortani aa46de5e5e adi_ip_alt: Add ad_generate_module_inst proc 
Add a tcl process, which can be used to generate custom module
names during the generation phase. This will be used to create
different ad_serdes_clk module, in case when independent IOPLLs are
needed for TX and RX.
 2016-10-24 11:43:00 +03:00
Istvan Csomortani 707038937a alt_serdes: Add additional parameters 
Add additional parameters to keep the top of ad_serdes_* modules
consistant through differente carriers.
 2016-10-24 11:42:43 +03:00
Rejeesh Kutty c9ac870086 usrpe31x- updates 2016-10-21 13:59:43 -04:00
Rejeesh Kutty 7b958fed87 hdlmake- updates 2016-10-21 13:59:43 -04:00
Rejeesh Kutty 48e90f0e9b usrpe31x- added 2016-10-21 13:59:43 -04:00