Istvan Csomortani
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db1c931736
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ad9625_plddr: PL DDR3 fixes
- Modified the axi slave interface handler
- Increased the rfifo_mem input depth to prevent overflow
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2014-07-23 19:34:44 +03:00 |
Istvan Csomortani
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4da8100fe5
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ad9625_plddr: Delete trailing whitespaces.
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2014-07-23 19:31:07 +03:00 |
Adrian Costina
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54b2cd74bf
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motor_control: cores modified so they can compile with the new common files
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2014-07-23 11:58:50 +03:00 |
Rejeesh Kutty
|
c0e31aa6c2
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daq2: latest hardware
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2014-07-21 09:06:57 -04:00 |
Rejeesh Kutty
|
e3320c43cb
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fmcomms2/c5soc: programmer file
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2014-07-21 09:06:55 -04:00 |
Rejeesh Kutty
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9b9e0c6a56
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fmcomms2/c5soc: signal tap
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2014-07-21 09:06:54 -04:00 |
Rejeesh Kutty
|
65879d621f
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daq2: updates for the new hardware
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2014-07-21 09:06:53 -04:00 |
Istvan Csomortani
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2b6ce1e504
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zc706_plddr3 : Fix axi_fifo2s_axi_mrst net
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2014-07-21 15:10:36 +03:00 |
Rejeesh Kutty
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2955b9db78
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fifo2s: flush if no request, c5soc: 14.0
|
2014-07-15 16:25:33 -04:00 |
Rejeesh Kutty
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e7d5d79e42
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daq2/kcu105: gth up and running - as it is commit
|
2014-07-10 10:56:37 -04:00 |
Istvan Csomortani
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085512a738
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fmcomms2_pr: Fix the source path for prcfg_setup
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2014-07-10 17:54:41 +03:00 |
Istvan Csomortani
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95701fbd0e
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fmcomms2_pr : PR initial check in
|
2014-07-10 10:41:48 +03:00 |
Rejeesh Kutty
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a9992f02b0
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fifo2s: bug fixes- on 64mhz dma clock
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2014-07-08 16:57:44 -04:00 |
Rejeesh Kutty
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b434fe6dd5
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fmcomms5: register map changes
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2014-07-08 16:57:43 -04:00 |
Istvan Csomortani
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dc78ced443
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prcfg_lib: Change the prcfg_top interface
Use the device core's gpio_input and gpio_output registers to get/set
status and control of PR.
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2014-07-08 12:28:25 +03:00 |
Istvan Csomortani
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75e624ef15
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prcfg_lib: Flop the status and mode nets
Flop the status and mode nets in case of BIST and QPSK configurations.
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2014-07-08 12:23:48 +03:00 |
Adrian Costina
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39ac29bb01
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AD9361: Altera, modified address width so that all registers are accessible
Modified qsys project with the new address span
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2014-07-08 10:41:51 +03:00 |
dbogdan
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10c21a343a
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fmcomms2/c5soc: Fixed the spim0_ss_in_n value.
|
2014-07-08 10:07:31 +03:00 |
dbogdan
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c53b257ab1
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fmcomms2/c5soc: Fixed the MOSI and MISO pin assignments.
|
2014-07-07 22:28:25 +03:00 |
Rejeesh Kutty
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c75e6b3043
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kcu105 pwr-good removed
|
2014-07-07 09:56:13 -04:00 |
Rejeesh Kutty
|
f2bf5ced04
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ad9625: register map updates
|
2014-07-03 14:30:03 -04:00 |
Rejeesh Kutty
|
f94cbbb0aa
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daq2: register map updates
|
2014-07-03 12:36:37 -04:00 |
Rejeesh Kutty
|
f3b20fd148
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axi_ad9625: register map updates
|
2014-07-03 11:19:31 -04:00 |
Rejeesh Kutty
|
1a78ac453e
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Merge branch 'devel' of github.com:analogdevicesinc/hdl into devel
|
2014-07-02 15:39:42 -04:00 |
Rejeesh Kutty
|
a388ccab0a
|
fmcomms2/c5soc: initial checkin
|
2014-07-02 14:56:00 -04:00 |
Rejeesh Kutty
|
e4ce00f7fb
|
axi_ad9680: register map changes
|
2014-07-02 12:50:09 -04:00 |
Istvan Csomortani
|
7e5748374d
|
prcfg_lib: Fixed prbs generator for QPSK
|
2014-07-02 18:14:35 +03:00 |
Istvan Csomortani
|
8eb7a55797
|
prcfg_lib: Fixed the gpio status merge logic
The previous logic did not passed implementation.
|
2014-07-02 18:09:48 +03:00 |
Istvan Csomortani
|
9089877c70
|
prcfg_lib: Fixed the sine tone generator for BIST
|
2014-07-02 18:00:43 +03:00 |
Lars-Peter Clausen
|
8a2b29cdbe
|
axi_damc: Add xfer_req to the FIFO source interface
The xfer_req signal will be high if DMA core the is expecting data.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
2014-07-02 16:05:16 +02:00 |
Rejeesh Kutty
|
31abd07613
|
axi_ad9144: register map changes
|
2014-07-01 21:43:04 -04:00 |
Rejeesh Kutty
|
9a08189b93
|
c5soc: initial a5soc copy
|
2014-07-01 13:09:38 -04:00 |
Rejeesh Kutty
|
c1b7fc17f5
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c5soc: initial a5soc copy
|
2014-07-01 13:05:26 -04:00 |
Rejeesh Kutty
|
60dd14bcdb
|
a5soc: removed jtag master control
|
2014-07-01 12:27:37 -04:00 |
Rejeesh Kutty
|
b6052773b7
|
added adc/dac gpio registers
|
2014-06-27 14:45:58 -04:00 |
Rejeesh Kutty
|
ba7955c531
|
fmcomms2: register map modifications
|
2014-06-26 10:09:03 -04:00 |
Rejeesh Kutty
|
4afe6c24e9
|
Merge branch 'devel' of github.com:analogdevicesinc/hdl into devel
|
2014-06-25 15:26:21 -04:00 |
Rejeesh Kutty
|
10a7804e14
|
ad9361: altera wrapper updates
|
2014-06-25 15:26:06 -04:00 |
Rejeesh Kutty
|
92e525d573
|
ad9250: register map updates
|
2014-06-25 15:24:48 -04:00 |
Rejeesh Kutty
|
4fdb3cfc4a
|
ad9250: register map updates
|
2014-06-25 15:23:57 -04:00 |
Rejeesh Kutty
|
4f5d163fcc
|
Merge branch 'master' into devel
|
2014-06-25 13:07:12 -04:00 |
Rejeesh Kutty
|
e38813fa9f
|
fifo- monitor status signals
|
2014-06-25 12:15:13 -04:00 |
Rejeesh Kutty
|
57bb3705f2
|
zc706-plddr3: read changes to lower dma clock
|
2014-06-25 09:20:58 -04:00 |
Rejeesh Kutty
|
4877df9bec
|
axi_fifo2s: make read dead slow
|
2014-06-25 09:20:57 -04:00 |
Rejeesh Kutty
|
985ace533e
|
ad9361: remove unused modules
|
2014-06-24 14:26:40 -04:00 |
Rejeesh Kutty
|
6b3312bbf9
|
library: register map changes and for mathworks
|
2014-06-24 14:24:22 -04:00 |
Rejeesh Kutty
|
d4be46cc17
|
library: register map changes and for mathworks
|
2014-06-24 14:23:56 -04:00 |
Rejeesh Kutty
|
e650253013
|
library: register map changes and for mathworks
|
2014-06-24 14:22:05 -04:00 |
Istvan Csomortani
|
89961c8dd7
|
prcfg_lib: Update the PR libraries
+ Flop the control nets too inside the adc/dac module
+ Flop the gpio_out in prcfg_top
|
2014-06-13 20:35:35 +03:00 |
Istvan Csomortani
|
3d8d576532
|
prcfg_script: Update the PR flow script
+ Make part global
+ No need the Explore directive on implementation
+ Fix some reference to pr module
+ Fix the pr_verify function
|
2014-06-13 20:33:59 +03:00 |