Commit Graph

10 Commits (5ad9dfd6c0a5d6914ccefb69d5a87bf85e267314)

Author SHA1 Message Date
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
2021-01-20 01:02:56 +02:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Sergiu Arpadi 3241924d14 sysid_intel: Added sysid to intel projects 2020-09-11 15:46:06 +03:00
Istvan Csomortani 79b6ba29ce all: Rename altera to intel 2019-06-29 06:53:51 +03:00
Laszlo Nagy 27f1e4eaed daq3: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Adrian Costina fe1adb6e4f daq3: A10GX, updated to the ADI JESD204
- changed lane rate to 12.33Gbps
- added dac fifo
2017-10-25 14:45:27 +01:00
Rejeesh Kutty 6100a697e8 daq3/a10gx- alt 16.1 updates 2017-06-07 10:23:20 -04:00
Rejeesh Kutty 4a783d523d projects/altera* - default & common qsys commands 2016-12-20 16:27:44 -05:00
Istvan Csomortani 9ace02a227 daq3/a10gx: Update project to the new GT framework 2016-10-06 10:25:25 +03:00
Adrian Costina 92c580a84d daq3: A10GX, updated project to the TCL flow 2016-07-08 12:00:37 +03:00