Commit Graph

8 Commits (5ad9dfd6c0a5d6914ccefb69d5a87bf85e267314)

Author SHA1 Message Date
Laszlo Nagy bdd5686e95 ad9081_fmca_ebz/a10soc: Make second sync CMOS and GPIO controllable 2022-05-26 09:13:05 +03:00
Laszlo Nagy 8df1d8eade ad9081_fmca_ebz: Update parameter description 2022-03-11 13:16:22 +02:00
stefan.raus adad6c930d ad9081_fmca_ebz_qsys.tcl: Add RX_LANE_RATE and TX_LANE_RATE parameters
For ad9081/a10soc project, the RX_LANE_RATE and TX_LANE_RATE were computed
from SAMPLE_RATE. Remove SAMPLE_RATE and add RX_LANE_RATE and TX_LANE_RATE
as parameters. Update also computation examples from comments.

Signed-off-by: stefan.raus <stefan.raus@analog.com>
2021-11-12 13:04:57 +02:00
Laszlo Nagy 51b643b978 Makefile: Fix misc makefiles from projects and library 2021-10-05 14:24:48 +03:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
David Winter e9e278c898 ad9081_fmca_ebz: Remove bypass gpio
Signed-off-by: David Winter <david.winter@analog.com>
2021-08-06 11:55:24 +03:00
Laszlo Nagy af3e1c7003 ad9081_fmca_ebz/a10soc: Np 12 support 2021-02-05 15:24:15 +02:00
Laszlo Nagy 0fd5590e56 ad9081_fmca_ebz: a10soc: Initial version
Parametrizable project with default profile of:

  M=8 L=4 SampleRate=250 MSPS
  LaneRate=10 Gbps
2021-02-05 10:24:59 +02:00